On 2/28/26 3:17 PM, Pengyu Luo wrote: > The DT configuration follows other Samsung 5nm-based Qualcomm SOCs, > utilizing the same register layouts and clock structures. > > However, DSI won't work properly for now until we submit dispcc fixes. > And some DSC enabled panels require DPU timing calculation fixes too. > (hdisplay / width timing round errors cause the fifo error) > > Co-developed-by: Tianyu Gao <[email protected]> > Signed-off-by: Tianyu Gao <[email protected]> > Signed-off-by: Pengyu Luo <[email protected]> > Tested-by: White Lewis <[email protected]> # HUAWEI Gaokun3 > ---
Reviewed-by: Konrad Dybcio <[email protected]> Konrad
