On 23/02/2026 19:08, Ekansh Gupta wrote:
User-space staging branch ============ https://github.com/qualcomm/fastrpc/tree/accel/staging
What would be really nice to see would be mesa integration allowing convergence of the xDSP/xPU accelerator space around something like a standard.
See: https://blog.tomeuvizoso.net/2025/07/rockchip-npu-update-6-we-are-in-mainline.html
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