The driver refers to "burst mode with sync pulse" and seems to be coded in a way that assumes it's a thing. However, I couldn't find any source that would confirm its existence (aside of very eager to make it up LLMs). The datasheet allows to choose between three modes:
- burst mode - non-burst mode with sync pulses - non-burst mode with sync events These three modes are also referenced across all sorts of MIPI DSI-related documentation over the Internet. Rename the define and default to burst mode, like other bridges tend to do. Signed-off-by: Sebastian Krzyszkowiak <[email protected]> --- drivers/gpu/drm/bridge/nwl-dsi.c | 8 ++------ drivers/gpu/drm/bridge/nwl-dsi.h | 2 +- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c index 2f7429b24fc2..c1859a04db97 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.c +++ b/drivers/gpu/drm/bridge/nwl-dsi.c @@ -257,7 +257,6 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) { u32 mode; int color_format; - bool burst_mode; int hfront_porch, hback_porch, vfront_porch, vback_porch; int hsync_len, vsync_len; @@ -298,15 +297,12 @@ static int nwl_dsi_config_dpi(struct nwl_dsi *dsi) NWL_DSI_HSYNC_POLARITY_ACTIVE_HIGH : NWL_DSI_HSYNC_POLARITY_ACTIVE_LOW); - burst_mode = (dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_BURST) && - !(dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE); - - if (burst_mode) { + if (dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_BURST) { nwl_dsi_write(dsi, NWL_DSI_VIDEO_MODE, NWL_DSI_VM_BURST_MODE); nwl_dsi_write(dsi, NWL_DSI_PIXEL_FIFO_SEND_LEVEL, 256); } else { mode = ((dsi->dsi_mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) ? - NWL_DSI_VM_BURST_MODE_WITH_SYNC_PULSES : + NWL_DSI_VM_NON_BURST_MODE_WITH_SYNC_PULSES : NWL_DSI_VM_NON_BURST_MODE_WITH_SYNC_EVENTS); nwl_dsi_write(dsi, NWL_DSI_VIDEO_MODE, mode); nwl_dsi_write(dsi, NWL_DSI_PIXEL_FIFO_SEND_LEVEL, diff --git a/drivers/gpu/drm/bridge/nwl-dsi.h b/drivers/gpu/drm/bridge/nwl-dsi.h index 61e7d65cb1eb..c81edc58647b 100644 --- a/drivers/gpu/drm/bridge/nwl-dsi.h +++ b/drivers/gpu/drm/bridge/nwl-dsi.h @@ -123,7 +123,7 @@ #define NWL_DSI_RX_VC(x) FIELD_GET(GENMASK(23, 22), (x)) /* DSI Video mode */ -#define NWL_DSI_VM_BURST_MODE_WITH_SYNC_PULSES 0 +#define NWL_DSI_VM_NON_BURST_MODE_WITH_SYNC_PULSES 0 #define NWL_DSI_VM_NON_BURST_MODE_WITH_SYNC_EVENTS BIT(0) #define NWL_DSI_VM_BURST_MODE BIT(1) --- base-commit: 2961f841b025fb234860bac26dfb7fa7cb0fb122 change-id: 20260218-nwl-dsi-burst-136c4c3ae9a0 Best regards, -- Sebastian Krzyszkowiak <[email protected]>
