Thanks for the patch, I pushed it.
I also added Matthew Brost's r-b, as I submitted this patch separately, and
b4-am recognised it as the same patch.
Kind regards,
~Maarten Lankhorst
Den 2025-11-07 kl. 04:31, skrev Junxiao Chang:
> MEI GSC interrupt comes from i915 or xe driver. It has top half and
> bottom half. Top half is called from i915/xe interrupt handler. It
> should be in irq disabled context.
>
> With RT kernel(PREEMPT_RT enabled), by default IRQ handler is in
> threaded IRQ. MEI GSC top half might be in threaded IRQ context.
> generic_handle_irq_safe API could be called from either IRQ or
> process context, it disables local IRQ then calls MEI GSC interrupt
> top half.
>
> This change fixes B580 GPU boot issue with RT enabled.
>
> Fixes: e02cea83d32d ("drm/xe/gsc: add Battlemage support")
> Tested-by: Baoli Zhang <[email protected]>
> Signed-off-by: Junxiao Chang <[email protected]>
> ---
> drivers/gpu/drm/xe/xe_heci_gsc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_heci_gsc.c
> b/drivers/gpu/drm/xe/xe_heci_gsc.c
> index a415ca4887914..32d509b113915 100644
> --- a/drivers/gpu/drm/xe/xe_heci_gsc.c
> +++ b/drivers/gpu/drm/xe/xe_heci_gsc.c
> @@ -221,7 +221,7 @@ void xe_heci_gsc_irq_handler(struct xe_device *xe, u32
> iir)
> if (xe->heci_gsc.irq < 0)
> return;
>
> - ret = generic_handle_irq(xe->heci_gsc.irq);
> + ret = generic_handle_irq_safe(xe->heci_gsc.irq);
> if (ret)
> drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n",
> ret);
> }
> @@ -241,7 +241,7 @@ void xe_heci_csc_irq_handler(struct xe_device *xe, u32
> iir)
> if (xe->heci_gsc.irq < 0)
> return;
>
> - ret = generic_handle_irq(xe->heci_gsc.irq);
> + ret = generic_handle_irq_safe(xe->heci_gsc.irq);
> if (ret)
> drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n",
> ret);
> }
