On 11/25/25 2:33 AM, Ayushi Makhija wrote: > Add device tree nodes for the DSI0 controller with their corresponding > PHY found on Qualcomm QCS8300 SoC. > > Signed-off-by: Ayushi Makhija <[email protected]> > Reviewed-by: Dmitry Baryshkov <[email protected]> > ---
[...]
> + port@1 {
> + reg = <1>;
> + dpu_intf1_out: endpoint {
\n please
[...]
port@0 {
> + reg = <0>;
> + mdss_dsi0_in: endpoint {
here and the other one too
> + remote-endpoint =
> <&dpu_intf1_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + mdss_dsi0_out: endpoint {
> + };
> + };
> + };
[...]
> + clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "ref";
1 a line, please
lgtm otherwise
Konrad
