> Subject: [v6 10/16] drm/i915/color: Add framework to program PRE/POST
> CSC LUT
> 
> Add framework that will help in loading LUT to Pre/Post CSC color blocks.
> 
> v2: Add dsb support
> v3: Align enum names
> v4: Propagate change in lut data to crtc_state
> 

Move this patch just before the 12th patch so that the next commit introduces 
the
Function that assigns load_plane_luts

Regards,
Suraj Kandpal

> Signed-off-by: Uma Shankar <[email protected]>
> Signed-off-by: Chaitanya Kumar Borah <[email protected]>
> ---
>  drivers/gpu/drm/i915/display/intel_color.c       | 16 ++++++++++++++++
>  .../gpu/drm/i915/display/intel_display_types.h   |  2 +-
>  drivers/gpu/drm/i915/display/intel_plane.c       |  4 ++++
>  3 files changed, 21 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index fd3c6b7b0f38..83b0cb519e44 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -93,6 +93,10 @@ struct intel_color_funcs {
>       /* Plane CSC*/
>       void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
>                                     const struct intel_plane_state
> *plane_state);
> +
> +     /* Plane Pre/Post CSC */
> +     void (*load_plane_luts)(struct intel_dsb *dsb,
> +                             const struct intel_plane_state *plane_state);
>  };
> 
>  #define CTM_COEFF_SIGN       (1ULL << 63)
> @@ -4076,11 +4080,23 @@ intel_color_load_plane_csc_matrix(struct
> intel_dsb *dsb,
>               display->funcs.color->load_plane_csc_matrix(dsb,
> plane_state);  }
> 
> +static void
> +intel_color_load_plane_luts(struct intel_dsb *dsb,
> +                         const struct intel_plane_state *plane_state) {
> +     struct intel_display *display = to_intel_display(plane_state);
> +
> +     if (display->funcs.color->load_plane_luts)
> +             display->funcs.color->load_plane_luts(dsb, plane_state); }
> +
>  void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
>                                       const struct intel_plane_state
> *plane_state)  {
>       if (plane_state->hw.ctm)
>               intel_color_load_plane_csc_matrix(dsb, plane_state);
> +     if (plane_state->hw.degamma_lut || plane_state->hw.gamma_lut)
> +             intel_color_load_plane_luts(dsb, plane_state);
>  }
> 
>  void intel_color_crtc_init(struct intel_crtc *crtc) diff --git
> a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index d25f90ded71f..d8fe80a55601 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -646,7 +646,7 @@ struct intel_plane_state {
>               enum drm_color_encoding color_encoding;
>               enum drm_color_range color_range;
>               enum drm_scaling_filter scaling_filter;
> -             struct drm_property_blob *ctm;
> +             struct drm_property_blob *ctm, *degamma_lut,
> *gamma_lut;
>       } hw;
> 
>       struct i915_vma *ggtt_vma;
> diff --git a/drivers/gpu/drm/i915/display/intel_plane.c
> b/drivers/gpu/drm/i915/display/intel_plane.c
> index a5d0f95a6f10..298f8e186fee 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane.c
> @@ -344,6 +344,10 @@ intel_plane_colorop_replace_blob(struct
> intel_plane_state *plane_state,  {
>       if (intel_colorop->id == INTEL_PLANE_CB_CSC)
>               return drm_property_replace_blob(&plane_state->hw.ctm,
> blob);
> +     else if (intel_colorop->id == INTEL_PLANE_CB_PRE_CSC_LUT)
> +             return  drm_property_replace_blob(&plane_state-
> >hw.degamma_lut, blob);
> +     else if (intel_colorop->id == INTEL_PLANE_CB_POST_CSC_LUT)
> +             return drm_property_replace_blob(&plane_state-
> >hw.gamma_lut, blob);
> 
>       return false;
>  }
> --
> 2.50.1

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