Hello Daniel,

在 2025-11-12 16:34:19,"Andy Yan" <[email protected]> 写道:
>
>
>Hello Daniel,
>
>At 2025-11-12 16:21:03, "Andy Yan" <[email protected]> wrote:
>>
>>Hello,
>>
>>At 2025-10-15 19:00:39, "Daniel Stone" <[email protected]> wrote:
>>>Planes can only source AFBC framebuffers at multiples of 4px wide.
>>>Instead of clipping when the user asks for an unaligned source
>>>rectangle, reject the configuration in the plane's atomic check.
>>>
>>>Signed-off-by: Daniel Stone <[email protected]>
>>>---
>>> drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 16 ++++++++++------
>>> 1 file changed, 10 insertions(+), 6 deletions(-)
>>>
>>>diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c 
>>>b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>index 65437437e3d5..0abaf3e0eab6 100644
>>>--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
>>>@@ -1068,12 +1068,19 @@ static int vop2_plane_atomic_check(struct drm_plane 
>>>*plane,
>>>      * This is workaround solution for IC design:
>>>      * esmart can't support scale down when src_w % 16 == 1.
>>>      */
>>>-    if (!vop2_cluster_window(win) && src_w > dsp_w && (src_w & 1)) {
>>>+    if (!vop2_cluster_window(win) && src_w > dest_w && (src_w & 1)) {
>>>             drm_dbg_kms(vop2->drm,
>>>                         "eSmart windows cannot downscale odd-width source 
>>> regions\n");
>>>             return -EINVAL;
>>>     }
>>> 
>>>+    if (drm_is_afbc(fb->modifier) && src_w % 4) {
>>>+            drm_dbg_kms(vop2->drm,
>>>+                        "AFBC source rectangles must be 4-byte aligned; is 
>>>%d\n",
>  
>  s/4-byte/4 pixel/

I've checked our BSP code, and this limitation only applies to RK3568. 
Other SoCs like RK3588/RK3576 don't have this limitation.


>
>>>+                        src_w);
>>>+            return -EINVAL;
>>>+    }
>>
>
>Just as a note here:
>After applying this patch, all weston-simple-egl tests under Weston will fall 
>back to GPU compositing mode. 
>This is because the rendered boxes in weston-simple-egl have a fixed size of 
>250x250, which is not aligned to 4 pixels and cannot be adjusted.
>
>>
>>
>>>+
>>>     return 0;
>>> }
>>> 
>>>@@ -1234,11 +1241,8 @@ static void vop2_plane_atomic_update(struct drm_plane 
>>>*plane,
>>>     WARN_ON(src_w < 4);
>>>     WARN_ON(src_h < 4);
>>> 
>>>-    if (afbc_en && src_w % 4) {
>>>-            drm_dbg_kms(vop2->drm, "vp%d %s src_w[%d] not 4 pixel 
>>>aligned\n",
>>>-                        vp->id, win->data->name, src_w);
>>>-            src_w = ALIGN_DOWN(src_w, 4);
>>>-    }
>>>+    if (drm_is_afbc(fb->modifier))
>>>+            WARN_ON(src_w % 4);
>>> 
>>>     act_info = (src_h - 1) << 16 | ((src_w - 1) & 0xffff);
>>>     dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
>>>-- 
>>>2.51.0

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