From: Sebastian Reichel <[email protected]> I planned to set the polarity of horizontal and vertical sync, but accidentally described vertical sync twice with different polarity instead.
Note, that there is no functional change, because the driver only makes use of DRM_MODE_FLAG_P[HV]SYNC to divert from the default active-low polarity. Reported-by: Laurent Pinchart <[email protected]> Closes: https://lore.kernel.org/all/[email protected]/ Fixes: a411558cc143 ("drm/panel: sitronix-st7789v: add Inanbo T28CP45TN89 support") Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Sebastian Reichel <[email protected]> --- Changes in v2: - Link to v1: https://lore.kernel.org/r/[email protected] - Add comment requested by Marek - Collect Reviewed-by tags --- drivers/gpu/drm/panel/panel-sitronix-st7789v.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index 04d91929eedda092b966b8cffdef5b267748f190..d5f821d6b23cb19dc01312e4eb3ed3fcfb254d42 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -249,6 +249,11 @@ static const struct drm_display_mode default_mode = { .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; +/* + * The mode data for this panel has been reverse engineered without access + * to the panel datasheet / manual. Using DRM_MODE_FLAG_PHSYNC like all + * other panels results in garbage data on the display. + */ static const struct drm_display_mode t28cp45tn89_mode = { .clock = 6008, .hdisplay = 240, @@ -261,7 +266,7 @@ static const struct drm_display_mode t28cp45tn89_mode = { .vtotal = 320 + 8 + 4 + 4, .width_mm = 43, .height_mm = 57, - .flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC, }; static const struct drm_display_mode et028013dma_mode = { --- base-commit: e5f0a698b34ed76002dc5cff3804a61c80233a7a change-id: 20250924-t28cp45tn89-fix-0931500ee88a Best regards, -- Sebastian Reichel <[email protected]>
