It seems only cluster windows are capable of applying downscaling when the source region has an odd width. Instead of applying a workaround inside atomic_update, fail the plane check if this is requested.
Signed-off-by: Daniel Stone <[email protected]> --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 21 ++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index f8039dc0e829..65437437e3d5 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -997,6 +997,7 @@ static int vop2_plane_atomic_check(struct drm_plane *plane, struct drm_crtc *crtc = pstate->crtc; struct drm_crtc_state *cstate; struct vop2_video_port *vp; + struct vop2_win *win = to_vop2_win(plane); struct vop2 *vop2; const struct vop2_data *vop2_data; struct drm_rect *dest = &pstate->dst; @@ -1063,6 +1064,16 @@ static int vop2_plane_atomic_check(struct drm_plane *plane, return -EINVAL; } + /* + * This is workaround solution for IC design: + * esmart can't support scale down when src_w % 16 == 1. + */ + if (!vop2_cluster_window(win) && src_w > dsp_w && (src_w & 1)) { + drm_dbg_kms(vop2->drm, + "eSmart windows cannot downscale odd-width source regions\n"); + return -EINVAL; + } + return 0; } @@ -1223,16 +1234,6 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, WARN_ON(src_w < 4); WARN_ON(src_h < 4); - /* - * This is workaround solution for IC design: - * esmart can't support scale down when src_w % 16 == 1. - */ - if (!vop2_cluster_window(win) && src_w > dsp_w && (src_w & 1)) { - drm_dbg_kms(vop2->drm, "vp%d %s act_w[%d] MODE 16 == 1\n", - vp->id, win->data->name, src_w); - src_w -= 1; - } - if (afbc_en && src_w % 4) { drm_dbg_kms(vop2->drm, "vp%d %s src_w[%d] not 4 pixel aligned\n", vp->id, win->data->name, src_w); -- 2.51.0
