On Wed, Oct 08, 2025 at 12:53:14PM +0100, Tvrtko Ursulin wrote:
> Let the TTM pool allocator know that we can afford for it to expend less
> effort for satisfying contiguous allocations larger than 2MiB. The latter
> is the maximum relevant PTE entry size and the driver and hardware are
> happy to get larger blocks only opportunistically.
>
> Signed-off-by: Tvrtko Ursulin <[email protected]>
> Cc: Alex Deucher <[email protected]>
> Cc: Christian König <[email protected]>
> Cc: Thadeu Lima de Souza Cascardo <[email protected]>
+Thomas - Seems like we'd want to do this in Xe too?
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 948c6d0a422b..723b885210a7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1837,7 +1837,7 @@ static int amdgpu_ttm_pools_init(struct amdgpu_device
> *adev)
> for (i = 0; i < adev->gmc.num_mem_partitions; i++) {
> ttm_pool_init(&adev->mman.ttm_pools[i], adev->dev,
> adev->gmc.mem_partitions[i].numa.node,
> - 0);
> + TTM_POOL_BENEFICIAL_ORDER(get_order(2 * SZ_1M)));
SZ_2M btw.
Matt
> }
> return 0;
> }
> @@ -1931,7 +1931,8 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> adev_to_drm(adev)->anon_inode->i_mapping,
> adev_to_drm(adev)->vma_offset_manager,
> (adev->need_swiotlb ? TTM_POOL_USE_DMA_ALLOC :
> 0) |
> - (dma_addressing_limited(adev->dev) ?
> TTM_POOL_USE_DMA32 : 0));
> + (dma_addressing_limited(adev->dev) ?
> TTM_POOL_USE_DMA32 : 0) |
> + TTM_POOL_BENEFICIAL_ORDER(get_order(2 * SZ_1M)));
> if (r) {
> dev_err(adev->dev,
> "failed initializing buffer object driver(%d).\n", r);
> --
> 2.48.0
>
