This change is equally a cleanup (less arguments) and preparation for
DE33 separate plane driver. It will introduce additional register space.

No functional changes.

Signed-off-by: Jernej Skrabec <[email protected]>
---
 drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 58 +++++++++++++-------------
 1 file changed, 28 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c 
b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 805db4ea714b..ba9c03f04f03 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -18,24 +18,24 @@
 #include "sun8i_vi_layer.h"
 #include "sun8i_vi_scaler.h"
 
-static void sun8i_vi_layer_disable(struct sun8i_mixer *mixer,
-                                  int channel, int overlay)
+static void sun8i_vi_layer_disable(struct sun8i_layer *layer)
 {
-       u32 ch_base = sun8i_channel_base(mixer, channel);
+       struct sun8i_mixer *mixer = layer->mixer;
+       u32 ch_base = sun8i_channel_base(mixer, layer->channel);
 
        regmap_write(mixer->engine.regs,
-                    SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), 0);
+                    SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay), 
0);
 }
 
-static void sun8i_vi_layer_update_attributes(struct sun8i_mixer *mixer,
-                                            int channel, int overlay,
+static void sun8i_vi_layer_update_attributes(struct sun8i_layer *layer,
                                             struct drm_plane *plane)
 {
        struct drm_plane_state *state = plane->state;
+       struct sun8i_mixer *mixer = layer->mixer;
        const struct drm_format_info *fmt;
        u32 val, ch_base, hw_fmt;
 
-       ch_base = sun8i_channel_base(mixer, channel);
+       ch_base = sun8i_channel_base(mixer, layer->channel);
        fmt = state->fb->format;
        sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
 
@@ -55,14 +55,15 @@ static void sun8i_vi_layer_update_attributes(struct 
sun8i_mixer *mixer,
        }
 
        regmap_write(mixer->engine.regs,
-                    SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), val);
+                    SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay), 
val);
 }
 
-static void sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
-                                       int overlay, struct drm_plane *plane)
+static void sun8i_vi_layer_update_coord(struct sun8i_layer *layer,
+                                       struct drm_plane *plane)
 {
        struct drm_plane_state *state = plane->state;
        const struct drm_format_info *format = state->fb->format;
+       struct sun8i_mixer *mixer = layer->mixer;
        u32 src_w, src_h, dst_w, dst_h;
        u32 outsize, insize;
        u32 hphase, vphase;
@@ -72,9 +73,9 @@ static void sun8i_vi_layer_update_coord(struct sun8i_mixer 
*mixer, int channel,
        u32 ch_base;
 
        DRM_DEBUG_DRIVER("Updating VI channel %d overlay %d\n",
-                        channel, overlay);
+                        layer->channel, layer->overlay);
 
-       ch_base = sun8i_channel_base(mixer, channel);
+       ch_base = sun8i_channel_base(mixer, layer->channel);
 
        src_w = drm_rect_width(&state->src) >> 16;
        src_h = drm_rect_height(&state->src) >> 16;
@@ -112,7 +113,7 @@ static void sun8i_vi_layer_update_coord(struct sun8i_mixer 
*mixer, int channel,
                         (state->src.y1 >> 16) & ~(format->vsub - 1));
        DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
        regmap_write(mixer->engine.regs,
-                    SUN8I_MIXER_CHAN_VI_LAYER_SIZE(ch_base, overlay),
+                    SUN8I_MIXER_CHAN_VI_LAYER_SIZE(ch_base, layer->overlay),
                     insize);
        regmap_write(mixer->engine.regs,
                     SUN8I_MIXER_CHAN_VI_OVL_SIZE(ch_base),
@@ -161,13 +162,13 @@ static void sun8i_vi_layer_update_coord(struct 
sun8i_mixer *mixer, int channel,
                hscale = (src_w << 16) / dst_w;
                vscale = (src_h << 16) / dst_h;
 
-               sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w,
+               sun8i_vi_scaler_setup(mixer, layer->channel, src_w, src_h, 
dst_w,
                                      dst_h, hscale, vscale, hphase, vphase,
                                      format);
-               sun8i_vi_scaler_enable(mixer, channel, true);
+               sun8i_vi_scaler_enable(mixer, layer->channel, true);
        } else {
                DRM_DEBUG_DRIVER("HW scaling is not needed\n");
-               sun8i_vi_scaler_enable(mixer, channel, false);
+               sun8i_vi_scaler_enable(mixer, layer->channel, false);
        }
 
        regmap_write(mixer->engine.regs,
@@ -188,10 +189,11 @@ static void sun8i_vi_layer_update_coord(struct 
sun8i_mixer *mixer, int channel,
                     SUN8I_MIXER_CHAN_VI_DS_M(vm));
 }
 
-static void sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int 
channel,
-                                        int overlay, struct drm_plane *plane)
+static void sun8i_vi_layer_update_buffer(struct sun8i_layer *layer,
+                                        struct drm_plane *plane)
 {
        struct drm_plane_state *state = plane->state;
+       struct sun8i_mixer *mixer = layer->mixer;
        struct drm_framebuffer *fb = state->fb;
        const struct drm_format_info *format = fb->format;
        struct drm_gem_dma_object *gem;
@@ -200,7 +202,7 @@ static void sun8i_vi_layer_update_buffer(struct sun8i_mixer 
*mixer, int channel,
        u32 ch_base;
        int i;
 
-       ch_base = sun8i_channel_base(mixer, channel);
+       ch_base = sun8i_channel_base(mixer, layer->channel);
 
        /* Adjust x and y to be dividable by subsampling factor */
        src_x = (state->src.x1 >> 16) & ~(format->hsub - 1);
@@ -232,7 +234,7 @@ static void sun8i_vi_layer_update_buffer(struct sun8i_mixer 
*mixer, int channel,
                                 i + 1, fb->pitches[i]);
                regmap_write(mixer->engine.regs,
                             SUN8I_MIXER_CHAN_VI_LAYER_PITCH(ch_base,
-                                                            overlay, i),
+                                                            layer->overlay, i),
                             fb->pitches[i]);
 
                DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n",
@@ -240,7 +242,7 @@ static void sun8i_vi_layer_update_buffer(struct sun8i_mixer 
*mixer, int channel,
 
                regmap_write(mixer->engine.regs,
                             SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base,
-                                                                overlay, i),
+                                                                
layer->overlay, i),
                             lower_32_bits(dma_addr));
        }
 }
@@ -292,20 +294,16 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane 
*plane,
        struct drm_plane_state *new_state = 
drm_atomic_get_new_plane_state(state,
                                                                           
plane);
        struct sun8i_layer *layer = plane_to_sun8i_layer(plane);
-       struct sun8i_mixer *mixer = layer->mixer;
 
        if (!new_state->crtc || !new_state->visible) {
-               sun8i_vi_layer_disable(mixer, layer->channel, layer->overlay);
+               sun8i_vi_layer_disable(layer);
                return;
        }
 
-       sun8i_vi_layer_update_attributes(mixer, layer->channel,
-                                        layer->overlay, plane);
-       sun8i_vi_layer_update_coord(mixer, layer->channel,
-                                   layer->overlay, plane);
-       sun8i_csc_config(mixer, layer->channel, new_state);
-       sun8i_vi_layer_update_buffer(mixer, layer->channel,
-                                    layer->overlay, plane);
+       sun8i_vi_layer_update_attributes(layer, plane);
+       sun8i_vi_layer_update_coord(layer, plane);
+       sun8i_csc_config(layer->mixer, layer->channel, new_state);
+       sun8i_vi_layer_update_buffer(layer, plane);
 }
 
 static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = {
-- 
2.51.0

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