DSP currently supports 32-bit IOVA (32-bit PA + 4-bit SID) for both Q6 and user DMA (uDMA) access. This is being upgraded to 34-bit PA + 4-bit SID due to a hardware revision in CDSP for Kaanapali SoC, which expands the DMA addressable range. Update DMA mask configuration in the driver to support CDSP on Kaanapali SoC. Set the default `dma_mask` to 32-bit and update it to 34-bit based on CDSP and SoC-specific compatible string.
Signed-off-by: Kumari Pallavi <[email protected]> --- drivers/misc/fastrpc.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c index 1a5d620b23f2..f2e5e53e9067 100644 --- a/drivers/misc/fastrpc.c +++ b/drivers/misc/fastrpc.c @@ -267,6 +267,7 @@ struct fastrpc_session_ctx { struct fastrpc_soc_data { u32 sid_pos; + u32 cdsp_dma_mask; }; struct fastrpc_channel_ctx { @@ -2178,6 +2179,7 @@ static int fastrpc_cb_probe(struct platform_device *pdev) int i, sessions = 0; unsigned long flags; int rc; + u32 dma_mask = 32; cctx = dev_get_drvdata(dev->parent); if (!cctx) @@ -2197,6 +2199,9 @@ static int fastrpc_cb_probe(struct platform_device *pdev) sess->dev = dev; dev_set_drvdata(dev, sess); + if (cctx->domain_id == CDSP_DOMAIN_ID) + dma_mask = cctx->soc_data->cdsp_dma_mask; + if (of_property_read_u32(dev->of_node, "reg", &sess->sid)) dev_info(dev, "FastRPC Session ID not specified in DT\n"); @@ -2211,9 +2216,9 @@ static int fastrpc_cb_probe(struct platform_device *pdev) } } spin_unlock_irqrestore(&cctx->lock, flags); - rc = dma_set_mask(dev, DMA_BIT_MASK(32)); + rc = dma_set_mask(dev, DMA_BIT_MASK(dma_mask)); if (rc) { - dev_err(dev, "32-bit DMA enable failed\n"); + dev_err(dev, "%u-bit DMA enable failed\n", dma_mask); return rc; } -- 2.34.1
