Hi Prabhakar,
On Wed, 3 Sept 2025 at 18:17, Prabhakar <[email protected]> wrote:
> From: Lad Prabhakar <[email protected]>
>
> Add MIPI DSI support for the Renesas RZ/V2H(P) SoC. Compared to the
> RZ/G2L family, the RZ/V2H(P) requires dedicated D-PHY PLL programming,
> different clock configuration, and additional timing parameter handling.
> The driver introduces lookup tables and helpers for D-PHY timings
> (TCLK*, THS*, TLPX, and ULPS exit) as specified in the RZ/V2H(P) hardware
> manual. ULPS exit timing depends on the LPCLK rate and is now handled
> explicitly.
>
> The implementation also adds support for 16 bpp RGB format, updates the
> clock setup path to use the RZ/V2H PLL divider limits, and provides new
> .dphy_init, .dphy_conf_clks, and .dphy_startup_late_init callbacks to
> match the RZ/V2H sequence.
>
> With these changes, the RZ/V2H(P) can operate the MIPI DSI interface in
> compliance with its hardware specification while retaining support for
> existing RZ/G2L platforms.
>
> Co-developed-by: Fabrizio Castro <[email protected]>
> Signed-off-by: Fabrizio Castro <[email protected]>
> Signed-off-by: Lad Prabhakar <[email protected]>
Thanks for your patch!
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +/**
> + * rzv2h_dphy_find_timings_val - Find timing parameter value from lookup
> tables
> + * @freq: Input frequency in Hz
> + * @index: Index to select timing parameter table (see enum
> rzv2h_dsi_timing_idx)
> + *
> + * Selects the timing table for the requested parameter, finds the
> + * frequency range entry and returns the register value to program:
> + *
> + * register_value = timings->base_value + table_index
> + *
> + * Note: frequency table entries are stored as small integers (units of 10):
> + * threshold_in_hz = (unsigned long)table_entry * 10 * MEGA
> + *
> + * Return: timing register value to be programmed into hardware
> + */
> +static u16 rzv2h_dphy_find_timings_val(unsigned long freq, u8 index)
> +{
> + const struct rzv2h_mipi_dsi_timings *timings;
> + u16 i;
> +
> + /* Get the timing table structure for the requested parameter */
> + timings = &rzv2h_dsi_timings_tables[index];
> +
> + /*
> + * Search through frequency table to find appropriate range
> + * timings->hsfreq[i] contains frequency values from HW manual
> + * Convert to Hz by multiplying by 10 * MEGA.
> + */
> + for (i = 0; i < timings->len; i++) {
> + unsigned long hsfreq = timings->hsfreq[i] * 10 * MEGA;
> +
> + if (freq <= hsfreq)
> + break;
> + }
> +
> + /* If frequency exceeds table range, use the last entry */
> + if (i == timings->len)
> + i--;
> +
> + /*
> + * Calculate final register value:
> + * - timings->base_value: base value for this timing parameter
> + * - i: index into frequency table (0-based)
> + * Combined they give the exact register value to program
> + */
> + return timings->base_value + i;
> +};
Unneeded semicolon.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
