On Mon, 29 Sep 2025, Lucas De Marchi wrote: > Hi, > > On Thu, Sep 18, 2025 at 01:58:57PM -0700, Lucas De Marchi wrote: > > There may be cases in which the BAR0 also needs to move to accommodate > > the bigger BAR2. However if it's not released, the BAR2 resize fails. > > During the vram probe it can't be released as it's already in use by > > xe_mmio for early register access. > > > > Add a new function in xe_vram and let xe_pci call it directly before > > even early device probe. This allows the BAR2 to resize in cases BAR0 > > also needs to move: > > > > [] xe 0000:03:00.0: vgaarb: deactivate vga console > > [] xe 0000:03:00.0: [drm] Attempting to resize bar from 8192MiB -> > > 16384MiB > > [] xe 0000:03:00.0: BAR 0 [mem 0x83000000-0x83ffffff 64bit]: releasing > > [] xe 0000:03:00.0: BAR 2 [mem 0x4000000000-0x41ffffffff 64bit pref]: > > releasing > > [] pcieport 0000:02:01.0: bridge window [mem 0x4000000000-0x41ffffffff > > 64bit pref]: releasing > > [] pcieport 0000:01:00.0: bridge window [mem 0x4000000000-0x41ffffffff > > 64bit pref]: releasing > > [] pcieport 0000:01:00.0: bridge window [mem 0x4000000000-0x43ffffffff > > 64bit pref]: assigned > > [] pcieport 0000:02:01.0: bridge window [mem 0x4000000000-0x43ffffffff > > 64bit pref]: assigned > > [] xe 0000:03:00.0: BAR 2 [mem 0x4000000000-0x43ffffffff 64bit pref]: > > assigned > > [] xe 0000:03:00.0: BAR 0 [mem 0x83000000-0x83ffffff 64bit]: assigned > > [] pcieport 0000:00:01.0: PCI bridge to [bus 01-04] > > [] pcieport 0000:00:01.0: bridge window [mem 0x83000000-0x840fffff] > > [] pcieport 0000:00:01.0: bridge window [mem > > 0x4000000000-0x44007fffff 64bit pref] > > [] pcieport 0000:01:00.0: PCI bridge to [bus 02-04] > > [] pcieport 0000:01:00.0: bridge window [mem 0x83000000-0x840fffff] > > [] pcieport 0000:01:00.0: bridge window [mem > > 0x4000000000-0x43ffffffff 64bit pref] > > [] pcieport 0000:02:01.0: PCI bridge to [bus 03] > > [] pcieport 0000:02:01.0: bridge window [mem 0x83000000-0x83ffffff] > > [] pcieport 0000:02:01.0: bridge window [mem > > 0x4000000000-0x43ffffffff 64bit pref] > > [] xe 0000:03:00.0: [drm] BAR2 resized to 16384M > > [] xe 0000:03:00.0: [drm:xe_pci_probe [xe]] BATTLEMAGE e221:0000 > > dgfx:1 gfx:Xe2_HPG (20.02) ... > > > > As shown above, it happens even before we try to read any register for > > platform identification. > > > > All the rebar logic is more pci-specific than xe-specific and can be > > done very early in the probe sequence. In future it would be good to > > move it out of xe_vram.c, but this refactor is left for later. > > Ilpo, can you take a look on this patch? It fixed the issue that I had > with BMG. It needs the first patch for the full fix, but the fixes are > more or less orthogonal.
FWIW, it looks okay to me from PCI perspective, Reviewed-by: Ilpo Järvinen <[email protected]> -- i.
