On Thu, Sep 25, 2025 at 03:04:58PM +0800, Xiangxu Yin wrote: > Add QCS615-specific configuration for USB/DP PHY, including DP init > routines, voltage swing tables, and platform data. Add compatible > "qcs615-qmp-usb3-dp-phy". > > Note: SW_PORTSELECT handling for orientation flip is not implemented > due to QCS615 fixed-orientation design and non-standard lane mapping. > > Signed-off-by: Xiangxu Yin <[email protected]> > --- > drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 407 > +++++++++++++++++++++++++++++++ > 1 file changed, 407 insertions(+) > + > +static const struct qmp_phy_init_tbl qmp_v2_dp_serdes_tbl_rbr[] = { > + QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x2c), > + QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x69), > + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0x00), > + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0x80), > + QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x07), > + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xbf), > + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0x21), > + QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x00), > + QMP_PHY_INIT_CFG(QSERDES_V2_TX_LANE_MODE_1, 0xc6),
Hmm, I just noticed. This register belongs to a _different_ space. As such you can't have it in the COM table. > +}; > + -- With best wishes Dmitry
