Introduce VCLKSET_BPP_MASK macro and use FIELD_PREP() to generate appropriate bitfield from mask and value without bitshift. Remove VCLKSET_COLOR_RGB which is never used, replace it with code comment.
Do not convert bits and bitfields to BIT() and GENMASK() yet, to be consisten with the current style. Conversion to BIT() and GENMASK() macros is done at the very end of this series in the last two patches. Signed-off-by: Marek Vasut <[email protected]> --- Cc: David Airlie <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Kieran Bingham <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Magnus Damm <[email protected]> Cc: Maxime Ripard <[email protected]> Cc: Simona Vetter <[email protected]> Cc: Thomas Zimmermann <[email protected]> Cc: Tomi Valkeinen <[email protected]> Cc: [email protected] Cc: [email protected] --- NOTE: No functional change expected, this is a preparatory patch which partly removes macros which evaluate to zeroes from rcar_mipi_dsi_regs.h . The other patches in this series proceed with that job, piece by piece, to make it all reviewable. --- V2: Move FIELD_PREP() back into rcar_mipi_dsi_regs.h V3: Include linux/bitfield.h which contains the FIELD_PREP() macro --- drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 4 +++- drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h | 12 ++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c index e13249e0134b4..f6427476feb72 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Renesas Electronics Corporation */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/io.h> @@ -624,6 +625,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, vclkset = VCLKSET_CKEN; rcar_mipi_dsi_write(dsi, VCLKSET, vclkset); + /* Output is always RGB, never YCbCr */ if (dsi_format == 24) vclkset |= VCLKSET_BPP_24; else if (dsi_format == 18) @@ -635,7 +637,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, return -EINVAL; } - vclkset |= VCLKSET_COLOR_RGB | VCLKSET_LANE(dsi->lanes - 1); + vclkset |= VCLKSET_LANE(dsi->lanes - 1); switch (dsi->info->model) { case RCAR_DSI_V3U: diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h index 90e8e3de3e580..468f84cd1325e 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h @@ -246,14 +246,14 @@ #define VCLKSET 0x100c #define VCLKSET_CKEN (1 << 16) -#define VCLKSET_COLOR_RGB (0 << 8) -#define VCLKSET_COLOR_YCC (1 << 8) +#define VCLKSET_COLOR_YCC (1 << 8) /* 0:RGB 1:YCbCr */ #define VCLKSET_DIV_V3U(x) (((x) & 0x3) << 4) #define VCLKSET_DIV_V4H(x) (((x) & 0x7) << 4) -#define VCLKSET_BPP_16 (0 << 2) -#define VCLKSET_BPP_18 (1 << 2) -#define VCLKSET_BPP_18L (2 << 2) -#define VCLKSET_BPP_24 (3 << 2) +#define VCLKSET_BPP_MASK (3 << 2) +#define VCLKSET_BPP_16 FIELD_PREP(VCLKSET_BPP_MASK, 0) +#define VCLKSET_BPP_18 FIELD_PREP(VCLKSET_BPP_MASK, 1) +#define VCLKSET_BPP_18L FIELD_PREP(VCLKSET_BPP_MASK, 2) +#define VCLKSET_BPP_24 FIELD_PREP(VCLKSET_BPP_MASK, 3) #define VCLKSET_LANE(x) (((x) & 0x3) << 0) #define VCLKEN 0x1010 -- 2.51.0
