commit c9b1150a68d9 ("drm/atomic-helper: Re-order bridge chain pre-enable
and post-disable") caused our display [1] to flicker constantly.Our setup is i.MX8MM mxsfb -> samsung_dsim -> sn65dsi83 (MIPI to LVDS) -> ETML1010G3DRA (display) Reverting the commit [2] let the display work again. Only difference in clk_summary is the change of dsi_phy_ref from 72400000 (flickering) to 18100000 (working) The same behavior can be seen with a ph128800t006-zhc01 display and dsi_phy_ref from 66500000 (flickering) to 16625000 (working) The root cause seems to be that mxsfb_crtc_atomic_enable is called after samsung_dsim_atomic_pre_enable. This changes the parent clock after the PLL is already configured. According to the commit [2] pre_enable hooks should not rely on clocks. Both drivers used in our setup work with clocks in pre_enable. Moving the clock setup from pre_enable to enable fix the issue for our setup. Please note that I am not deeply familiar with the DRM subsystem internals, and there might be side effects of this change that I haven't considered. [1] arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-peb-av-10.dtso [2] https://lore.kernel.org/all/20250605171524.27222-4-aradhya.bha...@linux.dev/ Signed-off-by: Jan Remmet <j.rem...@phytec.de> --- Jan Remmet (2): drm/bridge: ti-sn65dsi83: move clk setup to enable drm/bridge: samsung-dsim: move clk setup to enable drivers/gpu/drm/bridge/samsung-dsim.c | 14 ++++++++------ drivers/gpu/drm/bridge/ti-sn65dsi83.c | 16 ++++++++-------- 2 files changed, 16 insertions(+), 14 deletions(-) --- base-commit: bf40f4b87761e2ec16efc8e49b9ca0d81f4115d8 change-id: 20250925-wip-j-remmet-phytec-de-bspimx8m-3801_peb-av-10_with_ac209-058abe8477c6 Best regards, -- Jan Remmet <j.rem...@phytec.de>
