Hi Ville, On 4-Jul-25 12:31 PM, Ville Syrjälä wrote: > On Thu, Jul 03, 2025 at 04:38:24PM +0200, Hans de Goede wrote: >> From: Hans de Goede <[email protected]> >> >> It turns out that the fixup from vlv_fixup_mipi_sequences() is necessary >> for some DSI panel's with version 2 mipi-sequences too. >> >> Specifically the Acer Iconia One 8 A1-840 (not to be confused with the >> A1-840FHD which is different) has the following sequences: >> >> BDB block 53 (1284 bytes) - MIPI sequence block: >> Sequence block version v2 >> Panel 0 * >> >> Sequence 2 - MIPI_SEQ_INIT_OTP >> GPIO index 9, source 0, set 0 (0x00) >> Delay: 50000 us >> GPIO index 9, source 0, set 1 (0x01) >> Delay: 6000 us >> GPIO index 9, source 0, set 0 (0x00) >> Delay: 6000 us >> GPIO index 9, source 0, set 1 (0x01) >> Delay: 25000 us >> Send DCS: Port A, VC 0, LP, Type 39, Length 5, Data ff aa 55 a5 80 >> Send DCS: Port A, VC 0, LP, Type 39, Length 3, Data 6f 11 00 >> ... >> Send DCS: Port A, VC 0, LP, Type 05, Length 1, Data 29 >> Delay: 120000 us >> >> Sequence 4 - MIPI_SEQ_DISPLAY_OFF >> Send DCS: Port A, VC 0, LP, Type 05, Length 1, Data 28 >> Delay: 105000 us >> Send DCS: Port A, VC 0, LP, Type 05, Length 2, Data 10 00 >> Delay: 10000 us >> >> Sequence 5 - MIPI_SEQ_ASSERT_RESET >> Delay: 10000 us >> GPIO index 9, source 0, set 0 (0x00) >> >> Notice how there is no MIPI_SEQ_DEASSERT_RESET, instead the deassert >> is done at the beginning of MIPI_SEQ_INIT_OTP, which is exactly what >> the fixup from vlv_fixup_mipi_sequences() fixes up. >> >> Extend it to also apply to v2 sequences, this fixes the panel not working >> on the Acer Iconia One 8 A1-840. > > Do we have the full VBT for this machine already in some bug? If not, > please file a new issue with the VBT attached for posterity.
I've filed: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14605 with the VBT attached and I'll add a Closes: tag pointing to that to the patch while applying it to drm-intel-fixes. Regards, Hans > >> >> Signed-off-by: Hans de Goede <[email protected]> >> --- >> drivers/gpu/drm/i915/display/intel_bios.c | 8 ++++---- >> 1 file changed, 4 insertions(+), 4 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c >> b/drivers/gpu/drm/i915/display/intel_bios.c >> index ba7b8938b17c..166ee11831ab 100644 >> --- a/drivers/gpu/drm/i915/display/intel_bios.c >> +++ b/drivers/gpu/drm/i915/display/intel_bios.c >> @@ -1938,7 +1938,7 @@ static int get_init_otp_deassert_fragment_len(struct >> intel_display *display, >> int index, len; >> >> if (drm_WARN_ON(display->drm, >> - !data || panel->vbt.dsi.seq_version != 1)) >> + !data || panel->vbt.dsi.seq_version >= 3)) >> return 0; >> >> /* index = 1 to skip sequence byte */ >> @@ -1961,7 +1961,7 @@ static int get_init_otp_deassert_fragment_len(struct >> intel_display *display, >> } >> >> /* >> - * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. >> + * Some v1/v2 VBT MIPI sequences do the deassert in the init OTP sequence. >> * The deassert must be done before calling intel_dsi_device_ready, so for >> * these devices we split the init OTP sequence into a deassert sequence and >> * the actual init OTP part. >> @@ -1972,9 +1972,9 @@ static void vlv_fixup_mipi_sequences(struct >> intel_display *display, >> u8 *init_otp; >> int len; >> >> - /* Limit this to v1 vid-mode sequences */ >> + /* Limit this to v1/v2 vid-mode sequences */ >> if (panel->vbt.dsi.config->is_cmd_mode || >> - panel->vbt.dsi.seq_version != 1) >> + panel->vbt.dsi.seq_version >= 3) >> return; >> >> /* Only do this if there are otp and assert seqs and no deassert seq */ >> -- >> 2.49.0 >
