Use BIT() macro. Clean up lane count handling for non-4-lane panels.

Implement support for DSI command transfer mode using register based
access, with maximum payload length of 16 Bytes in Long Packet.

Marek Vasut (4):
  drm/rcar-du: dsi: Convert register bits to BIT() macro
  drm/rcar-du: dsi: Remove fixed PPI lane count setup
  drm/rcar-du: dsi: Configure TXSETR register to match PPI lane count
  drm/rcar-du: dsi: Implement DSI command support

 .../gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c   | 220 ++++++++++++++++-
 .../drm/renesas/rcar-du/rcar_mipi_dsi_regs.h  | 226 ++++++++++++++----
 2 files changed, 395 insertions(+), 51 deletions(-)
---
Cc: David Airlie <[email protected]>
Cc: Geert Uytterhoeven <[email protected]>
Cc: Kieran Bingham <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Maarten Lankhorst <[email protected]>
Cc: Magnus Damm <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: Simona Vetter <[email protected]>
Cc: Thomas Zimmermann <[email protected]>
Cc: Tomi Valkeinen <[email protected]>
Cc: [email protected]
Cc: [email protected]

-- 
2.47.2

Reply via email to