On Wed, 2025-02-26 at 21:27 +0530, Aradhya Bhatia wrote: > From: Aradhya Bhatia <[email protected]> > > The way any singular display pipeline, in need of a modeset, gets > enabled is as follows - > > crtc enable > (all) bridge pre-enable > encoder enable > (all) bridge enable > > - and the disable sequence is exactly the reverse of this. > > The crtc operations occur by looping over the old and new crtc states, > while the encoder and bridge operations occur together, by looping over > the connector states of the display pipelines. > > Refactor these operations - crtc enable/disable, and encoder & bridge > (pre/post) enable/disable - into separate functions each, to make way > for the re-ordering of the enable/disable sequences. > > This patch doesn't alter the sequence of crtc/encoder/bridge operations > in any way, but helps to cleanly pave the way for the next two patches, > by maintaining logical bisectability. > > Reviewed-by: Tomi Valkeinen <[email protected]> > Reviewed-by: Dmitry Baryshkov <[email protected]> > Tested-by: Tomi Valkeinen <[email protected]> > Signed-off-by: Aradhya Bhatia <[email protected]> > Signed-off-by: Aradhya Bhatia <[email protected]>
Tested with AM62 OLDI series [1] on AM625 with single channel AUO 800x480 LVDS panel. No issues with the patch! Tested-by: Alexander Sverdlin <[email protected]> [1] Link: https://lore.kernel.org/all/[email protected]/ > --- > drivers/gpu/drm/drm_atomic_helper.c | 69 ++++++++++++++++++++--------- > 1 file changed, 49 insertions(+), 20 deletions(-) -- Alexander Sverdlin Siemens AG www.siemens.com
