On Wed, Mar 26, 2025 at 01:34:13PM +0800, Hermes Wu via B4 Relay wrote: > From: Hermes Wu <[email protected]> > > In order to reset HW link auto training state, > bits FORCE_RETRAIN and MANUAL_TRAIN at REG_TRAIN_CTRL1 must be set > at the same time.
Nit: please start by describing the problem that the patch attempts to solve. > > Signed-off-by: Hermes Wu <[email protected]> > --- > drivers/gpu/drm/bridge/ite-it6505.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/ite-it6505.c > b/drivers/gpu/drm/bridge/ite-it6505.c > index > 88ef76a37fe6accacdd343839ff2569b31b18ceb..b47042dc06bb1e1dfd92bc0dc6d69dc918a140ba > 100644 > --- a/drivers/gpu/drm/bridge/ite-it6505.c > +++ b/drivers/gpu/drm/bridge/ite-it6505.c > @@ -1806,7 +1806,9 @@ static bool it6505_link_start_auto_train(struct it6505 > *it6505) > mutex_lock(&it6505->aux_lock); > it6505_set_bits(it6505, REG_TRAIN_CTRL0, > FORCE_CR_DONE | FORCE_EQ_DONE, 0x00); > - it6505_write(it6505, REG_TRAIN_CTRL1, FORCE_RETRAIN); > + /* reset link state machine and re start training*/ > + it6505_write(it6505, REG_TRAIN_CTRL1, > + FORCE_RETRAIN | MANUAL_TRAIN); > it6505_write(it6505, REG_TRAIN_CTRL1, AUTO_TRAIN); > > while (timeout > 0) { > @@ -2377,7 +2379,7 @@ static void it6505_stop_link_train(struct it6505 > *it6505) > { > it6505->link_state = LINK_IDLE; > cancel_work_sync(&it6505->link_works); > - it6505_write(it6505, REG_TRAIN_CTRL1, FORCE_RETRAIN); > + it6505_write(it6505, REG_TRAIN_CTRL1, FORCE_RETRAIN | MANUAL_TRAIN); > } > > static void it6505_link_train_ok(struct it6505 *it6505) > > -- > 2.34.1 > > -- With best wishes Dmitry
