Hi Marek,
Am Donnerstag, 27. Februar 2025, 17:58:04 CET schrieb Marek Vasut:
> The instance of the GPU populated in Freescale i.MX95 does require
> release from reset by writing into a single GPUMIX block controller
> GPURESET register bit 0. Implement support for one optional reset.
>
> Signed-off-by: Marek Vasut <[email protected]>
> ---
> Cc: Boris Brezillon <[email protected]>
> Cc: Conor Dooley <[email protected]>
> Cc: David Airlie <[email protected]>
> Cc: Fabio Estevam <[email protected]>
> Cc: Krzysztof Kozlowski <[email protected]>
> Cc: Liviu Dudau <[email protected]>
> Cc: Maarten Lankhorst <[email protected]>
> Cc: Maxime Ripard <[email protected]>
> Cc: Pengutronix Kernel Team <[email protected]>
> Cc: Philipp Zabel <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: Sascha Hauer <[email protected]>
> Cc: Sebastian Reichel <[email protected]>
> Cc: Shawn Guo <[email protected]>
> Cc: Simona Vetter <[email protected]>
> Cc: Steven Price <[email protected]>
> Cc: Thomas Zimmermann <[email protected]>
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> Cc: [email protected]
> ---
> drivers/gpu/drm/panthor/Kconfig | 1 +
> drivers/gpu/drm/panthor/panthor_device.c | 23 +++++++++++++++++++++++
> drivers/gpu/drm/panthor/panthor_device.h | 3 +++
> 3 files changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/panthor/Kconfig b/drivers/gpu/drm/panthor/Kconfig
> index 55b40ad07f3b0..ab62bd6a0750f 100644
> --- a/drivers/gpu/drm/panthor/Kconfig
> +++ b/drivers/gpu/drm/panthor/Kconfig
> @@ -14,6 +14,7 @@ config DRM_PANTHOR
> select IOMMU_IO_PGTABLE_LPAE
> select IOMMU_SUPPORT
> select PM_DEVFREQ
> + select RESET_SIMPLE if SOC_IMX9
> help
> DRM driver for ARM Mali CSF-based GPUs.
>
> diff --git a/drivers/gpu/drm/panthor/panthor_device.c
> b/drivers/gpu/drm/panthor/panthor_device.c
> index a9da1d1eeb707..51ee9cae94504 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.c
> +++ b/drivers/gpu/drm/panthor/panthor_device.c
> @@ -64,6 +64,17 @@ static int panthor_clk_init(struct panthor_device *ptdev)
> return 0;
> }
>
> +static int panthor_reset_init(struct panthor_device *ptdev)
> +{
> + ptdev->resets =
> devm_reset_control_get_optional_exclusive_deasserted(ptdev->base.dev, NULL);
If the description as a write-once register is true, wouldn't this
already write to it?
> + if (IS_ERR(ptdev->resets))
> + return dev_err_probe(ptdev->base.dev,
> + PTR_ERR(ptdev->resets),
> + "get reset failed");
> +
> + return 0;
> +}
> +
> void panthor_device_unplug(struct panthor_device *ptdev)
> {
> /* This function can be called from two different path: the reset work
> @@ -217,6 +228,10 @@ int panthor_device_init(struct panthor_device *ptdev)
> if (ret)
> return ret;
>
> + ret = panthor_reset_init(ptdev);
> + if (ret)
> + return ret;
> +
> ret = panthor_devfreq_init(ptdev);
> if (ret)
> return ret;
> @@ -470,6 +485,10 @@ int panthor_device_resume(struct device *dev)
> if (ret)
> goto err_disable_stacks_clk;
>
> + ret = reset_control_deassert(ptdev->resets);
> + if (ret)
> + goto err_disable_coregroup_clk;
> +
This wouldn't work at all on a write-once register, no? Same for resume.
Best regards
Alexander
> panthor_devfreq_resume(ptdev);
>
> if (panthor_device_is_initialized(ptdev) &&
> @@ -512,6 +531,9 @@ int panthor_device_resume(struct device *dev)
>
> err_suspend_devfreq:
> panthor_devfreq_suspend(ptdev);
> + reset_control_assert(ptdev->resets);
> +
> +err_disable_coregroup_clk:
> clk_disable_unprepare(ptdev->clks.coregroup);
>
> err_disable_stacks_clk:
> @@ -563,6 +585,7 @@ int panthor_device_suspend(struct device *dev)
>
> panthor_devfreq_suspend(ptdev);
>
> + reset_control_assert(ptdev->resets);
> clk_disable_unprepare(ptdev->clks.coregroup);
> clk_disable_unprepare(ptdev->clks.stacks);
> clk_disable_unprepare(ptdev->clks.core);
> diff --git a/drivers/gpu/drm/panthor/panthor_device.h
> b/drivers/gpu/drm/panthor/panthor_device.h
> index da6574021664b..fea3a05778e2e 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.h
> +++ b/drivers/gpu/drm/panthor/panthor_device.h
> @@ -111,6 +111,9 @@ struct panthor_device {
> struct clk *coregroup;
> } clks;
>
> + /** @resets: GPU reset. */
> + struct reset_control *resets;
Your commit message says "one optional reset", so I would name this just
reset.
> +
> /** @coherent: True if the CPU/GPU are memory coherent. */
> bool coherent;
>
>
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