+ Sebastina, Hi Sebastian, I think you also need this patch when you test DSI on rk3588 with DSI2 support patch from Heiko.
At 2024-04-26 03:55:05, "Heiko Stuebner" <[email protected]> wrote: >From: Heiko Stuebner <[email protected]> > >The clock is in Hz while the value checked against is in kHz, so >actual frequencies will never be able to be below to max value. >Fix this by specifying the max-value in Hz too. > >Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588") >Signed-off-by: Heiko Stuebner <[email protected]> >--- > drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > >diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >index 9bee1fd88e6a2..523880a4e8e74 100644 >--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c >@@ -1719,7 +1719,7 @@ static unsigned long rk3588_calc_cru_cfg(struct >vop2_video_port *vp, int id, > else > dclk_out_rate = v_pixclk >> 2; > >- dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000); >+ dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000); > if (!dclk_rate) { > drm_err(vop2->drm, "DP dclk_out_rate out of range, > dclk_out_rate: %ld KHZ\n", > dclk_out_rate); >@@ -1736,7 +1736,7 @@ static unsigned long rk3588_calc_cru_cfg(struct >vop2_video_port *vp, int id, > * dclk_rate = N * dclk_core_rate N = (1,2,4 ), > * we get a little factor here > */ >- dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000); >+ dclk_rate = rk3588_calc_dclk(dclk_out_rate, 600000000); > if (!dclk_rate) { > drm_err(vop2->drm, "MIPI dclk out of range, > dclk_out_rate: %ld KHZ\n", > dclk_out_rate); >-- >2.39.2
