[PATCH v5? 6/6] dts: rockchip: add HDMI0 entry for RK3588 and change VO0/1 GRF compatibles

[Shimrra Shai]

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index b6e4df180..76cb0f7f7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -582,13 +582,13 @@ vop_grf: syscon@fd5a4000 {
        };

        vo0_grf: syscon@fd5a6000 {
-               compatible = "rockchip,rk3588-vo-grf", "syscon";
+               compatible = "rockchip,rk3588-vo0-grf", "syscon";
                reg = <0x0 0xfd5a6000 0x0 0x2000>;
                clocks = <&cru PCLK_VO0GRF>;
        };

        vo1_grf: syscon@fd5a8000 {
-               compatible = "rockchip,rk3588-vo-grf", "syscon";
+               compatible = "rockchip,rk3588-vo1-grf", "syscon";
                reg = <0x0 0xfd5a8000 0x0 0x100>;
                clocks = <&cru PCLK_VO1GRF>;
        };
@@ -1254,6 +1254,46 @@ i2s9_8ch: i2s@fddfc000 {
                status = "disabled";
        };

+       hdmi0: hdmi@fde80000 {
+               compatible = "rockchip,rk3588-dw-hdmi-qp";
+               reg = <0x0 0xfde80000 0x0 0x20000>;
+               clocks = <&cru PCLK_HDMITX0>,
+                        <&cru CLK_HDMITX0_EARC>,
+                        <&cru CLK_HDMITX0_REF>,
+                        <&cru MCLK_I2S5_8CH_TX>,
+                        <&cru CLK_HDMIHDP0>,
+                        <&cru HCLK_VO1>;
+               clock-names = "pclk", "earc", "ref", "aud", "hdp", "hclk_vo1";
+               interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH 0>,
+                            <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0>;
+               interrupt-names = "avp", "cec", "earc", "main", "hpd";
+               phys = <&hdptxphy_hdmi0>;
+               phy-names = "hdmi";
+               power-domains = <&power RK3588_PD_VO1>;
+               resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>;
+               reset-names = "ref", "hdp";
+               rockchip,grf = <&sys_grf>;
+               rockchip,vo1-grf = <&vo1_grf>;
+               #sound-dai-cells = <0>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       hdmi0_in: port@0 {
+                               reg = <0>;
+                       };
+
+                       hdmi0_out: port@1 {
+                               reg = <1>;
+                       };
+               };
+       };
+
        qos_gpu_m0: qos@fdf35000 {
                compatible = "rockchip,rk3588-qos", "syscon";
                reg = <0x0 0xfdf35000 0x0 0x20>;