On Wed, 23 Aug 2023, Ankit Nautiyal <[email protected]> wrote:
> Edid specific BPC constraints are stored in limits->max_bpp. Honor these
> limits while computing the input bpp for DSC.
>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5b48bfe09d0e..2a7f6cfe2832 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2061,9 +2061,11 @@ static int intel_edp_dsc_compute_pipe_bpp(struct
> intel_dp *intel_dp,
> if (forced_bpp) {
> pipe_bpp = forced_bpp;
> } else {
> + u8 max_bpc = limits->max_bpp / 3;
> +
int max_bpc = min_t(int, limits->max_bpp / 3,
conn_state->max_requested_bpc);
> /* For eDP use max bpp that can be supported with DSC. */
> pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, max_bbc);
Nitpick, IMO looks cleaner this way, as well as uses int instead of u8
for computations.
BR,
Jani.
> if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits,
> pipe_bpp)) {
> drm_dbg_kms(&i915->drm,
> "Computed BPC is not in DSC BPC limits\n");
--
Jani Nikula, Intel Open Source Graphics Center
