Hi,

Here's a collection of patches for the HVS and CRTCs that fix a few
issues (with DMA accesses and timings, mostly), and add a few minor
features.

Let me know what you think,
Maxime

To: Emma Anholt <[email protected]>
To: Maxime Ripard <[email protected]>
To: David Airlie <[email protected]>
To: Daniel Vetter <[email protected]>
To: Eric Anholt <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Dave Stevenson <[email protected]>
Cc: Mateusz Kwiatkowski <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>

---
Dave Stevenson (12):
      drm/vc4: hvs: Configure the HVS COB allocations
      drm/vc4: hvs: Set AXI panic modes
      drm/vc4: hvs: SCALER_DISPBKGND_AUTOHS is only valid on HVS4
      drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5
      drm/vc4: hvs: Support zpos on all planes
      drm/vc4: hvs: Fix colour order for xRGB1555 on HVS5
      drm/vc4: hvs: Add DRM 210101010 RGB formats
      drm/vc4: plane: Allow using 0 as a pixel order value
      drm/vc4: plane: Omit pixel_order from the hvs_format for hvs5 only formats
      drm/vc4: plane: Add 3:3:2 and 4:4:4:4 RGB/RGBX/RGBA formats
      drm/vc4: Add comments for which HVS_PIXEL_ORDER_xxx defines apply
      drm/vc4: hdmi: Correct interlaced timings again

Mateusz Kwiatkowski (2):
      drm/vc4: crtc: Fix timings for VEC modes
      drm/vc4: vec: Support progressive modes

Maxime Ripard (1):
      drm/vc4: hvs: Ignore atomic_flush if we're disabled

 drivers/gpu/drm/vc4/vc4_crtc.c  |  71 +++++++++-------
 drivers/gpu/drm/vc4/vc4_hdmi.c  |   5 +-
 drivers/gpu/drm/vc4/vc4_hvs.c   | 175 +++++++++++++++++++++++++++++++---------
 drivers/gpu/drm/vc4/vc4_kms.c   |   1 +
 drivers/gpu/drm/vc4/vc4_plane.c | 139 ++++++++++++++++++++++++++++---
 drivers/gpu/drm/vc4/vc4_regs.h  |  20 ++++-
 drivers/gpu/drm/vc4/vc4_vec.c   |   4 +-
 7 files changed, 337 insertions(+), 78 deletions(-)
---
base-commit: 99e2d98adc738597abcc5d38b03d0e9858db5c00
change-id: 20221207-rpi-hvs-crtc-misc-d97190d6a622

Best regards,
-- 
Maxime Ripard <[email protected]>

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