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DCN 3.1.6 needs it, but I don't know if yellow carp needs it.  I think this is 
only applicable to kernel 5.18.  @Kazlauskas, 
Nicholas<mailto:[email protected]> can you verify?

Alex

________________________________
From: VURDIGERENATARAJ, CHANDAN <[email protected]>
Sent: Wednesday, May 18, 2022 8:36 AM
To: Sasha Levin <[email protected]>; [email protected] 
<[email protected]>; [email protected] <[email protected]>
Cc: Yang, Eric <[email protected]>; [email protected] 
<[email protected]>; Li, Sun peng (Leo) <[email protected]>; Pan, Xinhui 
<[email protected]>; Siqueira, Rodrigo <[email protected]>; 
[email protected] <[email protected]>; Koenig, 
Christian <[email protected]>; [email protected] <[email protected]>; 
[email protected] <[email protected]>; 
[email protected] <[email protected]>; [email protected] <[email protected]>; 
Deucher, Alexander <[email protected]>; [email protected] 
<[email protected]>; Wentland, Harry <[email protected]>; Kazlauskas, 
Nicholas <[email protected]>; Kotarac, Pavle <[email protected]>
Subject: RE: [PATCH AUTOSEL 5.17 13/23] drm/amd/display: undo clearing of z10 
related function pointers

Hi,

Is S0i3 verified for DCN 3.1.6 with this?

BR,
Chandan V N

>From: Eric Yang <[email protected]>
>
>[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ]
>
> [Why]
>Z10 and S0i3 have some shared path. Previous code clean up , incorrectly 
>removed these pointers, which breaks s0i3 restore
>
> [How]
>Do not clear the function pointers based on Z10 disable.
>
>Reviewed-by: Nicholas Kazlauskas <[email protected]>
>Acked-by: Pavle Kotarac <[email protected]>
>Signed-off-by: Eric Yang <[email protected]>
>Signed-off-by: Alex Deucher <[email protected]>
>Signed-off-by: Sasha Levin <[email protected]>
>---
> drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 -----
> 1 file changed, 5 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c 
>b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>index d7559e5a99ce..e708f07fe75a 100644
>--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c
>@@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc)
>                dc->hwss.init_hw = dcn20_fpga_init_hw;
>                dc->hwseq->funcs.init_pipes = NULL;
>        }
>-      if (dc->debug.disable_z10) {
>-              /*hw not support z10 or sw disable it*/
>-              dc->hwss.z10_restore = NULL;
>-              dc->hwss.z10_save_init = NULL;
>-      }
> }
>--
>2.35.1
>

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