Hi Marek,
On Sat, Oct 16, 2021 at 11:04:02PM +0200, Marek Vasut wrote:
> Current code always sets reset line low in .pre_enable callback and
> holds it low for 10ms. This is sub-optimal and increases the time
> between enablement of the DSI83 and valid LVDS clock.
>
> Rework the reset handling such that the reset line is held low for 10ms
> both in probe() of the driver and .disable callback, which guarantees
> that the reset line was always held low for more than 10ms and therefore
> the reset line timing requirement is satisfied. Furthermore, move the
> reset handling into .enable callback so the entire DSI83 initialization
> is now in one place.
>
> This reduces DSI83 enablement delay by up to 10ms.
>
> Signed-off-by: Marek Vasut <[email protected]>
> Cc: Laurent Pinchart <[email protected]>
> Cc: Linus Walleij <[email protected]>
> Cc: Robert Foss <[email protected]>
> Cc: Sam Ravnborg <[email protected]>
> Cc: [email protected]
Applied to drm-misc-next,
Sam
