Hi Rob, I love your patch! Yet something to improve:
[auto build test ERROR on iommu/next] [also build test ERROR on drm-intel/for-linux-next drm-tip/drm-tip drm-exynos/exynos-drm-next tegra-drm/drm/tegra/for-next linus/master v5.13-rc4 next-20210603] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Rob-Clark/iommu-arm-smmu-adreno-smmu-page-fault-handling/20210603-005246 base: https://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git next config: arm64-randconfig-r001-20210603 (attached as .config) compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project d8e0ae9a76a62bdc6117630d59bf9967ac9bb4ea) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install arm64 cross compiling tool for clang build # apt-get install binutils-aarch64-linux-gnu # https://github.com/0day-ci/linux/commit/cdbd07b471b955a50c15ea2a86f73c39bea6dfa5 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Rob-Clark/iommu-arm-smmu-adreno-smmu-page-fault-handling/20210603-005246 git checkout cdbd07b471b955a50c15ea2a86f73c39bea6dfa5 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <[email protected]> All errors (new ones prefixed by >>): >> drivers/gpu/drm/msm/msm_gpu.c:510:53: error: too many arguments to function >> call, expected 4, have 5 msm_gpu_crashstate_capture(gpu, submit, comm, cmd, false); ~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~ drivers/gpu/drm/msm/msm_gpu.c:432:13: note: 'msm_gpu_crashstate_capture' declared here static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, ^ 1 error generated. vim +510 drivers/gpu/drm/msm/msm_gpu.c 460 461 static void recover_worker(struct kthread_work *work) 462 { 463 struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work); 464 struct drm_device *dev = gpu->dev; 465 struct msm_drm_private *priv = dev->dev_private; 466 struct msm_gem_submit *submit; 467 struct msm_ringbuffer *cur_ring = gpu->funcs->active_ring(gpu); 468 char *comm = NULL, *cmd = NULL; 469 int i; 470 471 mutex_lock(&dev->struct_mutex); 472 473 DRM_DEV_ERROR(dev->dev, "%s: hangcheck recover!\n", gpu->name); 474 475 submit = find_submit(cur_ring, cur_ring->memptrs->fence + 1); 476 if (submit) { 477 struct task_struct *task; 478 479 /* Increment the fault counts */ 480 gpu->global_faults++; 481 submit->queue->faults++; 482 483 task = get_pid_task(submit->pid, PIDTYPE_PID); 484 if (task) { 485 comm = kstrdup(task->comm, GFP_KERNEL); 486 cmd = kstrdup_quotable_cmdline(task, GFP_KERNEL); 487 put_task_struct(task); 488 } 489 490 /* msm_rd_dump_submit() needs bo locked to dump: */ 491 for (i = 0; i < submit->nr_bos; i++) 492 msm_gem_lock(&submit->bos[i].obj->base); 493 494 if (comm && cmd) { 495 DRM_DEV_ERROR(dev->dev, "%s: offending task: %s (%s)\n", 496 gpu->name, comm, cmd); 497 498 msm_rd_dump_submit(priv->hangrd, submit, 499 "offending task: %s (%s)", comm, cmd); 500 } else { 501 msm_rd_dump_submit(priv->hangrd, submit, NULL); 502 } 503 504 for (i = 0; i < submit->nr_bos; i++) 505 msm_gem_unlock(&submit->bos[i].obj->base); 506 } 507 508 /* Record the crash state */ 509 pm_runtime_get_sync(&gpu->pdev->dev); > 510 msm_gpu_crashstate_capture(gpu, submit, comm, cmd, false); 511 pm_runtime_put_sync(&gpu->pdev->dev); 512 513 kfree(cmd); 514 kfree(comm); 515 516 /* 517 * Update all the rings with the latest and greatest fence.. this 518 * needs to happen after msm_rd_dump_submit() to ensure that the 519 * bo's referenced by the offending submit are still around. 520 */ 521 for (i = 0; i < gpu->nr_rings; i++) { 522 struct msm_ringbuffer *ring = gpu->rb[i]; 523 524 uint32_t fence = ring->memptrs->fence; 525 526 /* 527 * For the current (faulting?) ring/submit advance the fence by 528 * one more to clear the faulting submit 529 */ 530 if (ring == cur_ring) 531 fence++; 532 533 update_fences(gpu, ring, fence); 534 } 535 536 if (msm_gpu_active(gpu)) { 537 /* retire completed submits, plus the one that hung: */ 538 retire_submits(gpu); 539 540 pm_runtime_get_sync(&gpu->pdev->dev); 541 gpu->funcs->recover(gpu); 542 pm_runtime_put_sync(&gpu->pdev->dev); 543 544 /* 545 * Replay all remaining submits starting with highest priority 546 * ring 547 */ 548 for (i = 0; i < gpu->nr_rings; i++) { 549 struct msm_ringbuffer *ring = gpu->rb[i]; 550 551 spin_lock(&ring->submit_lock); 552 list_for_each_entry(submit, &ring->submits, node) 553 gpu->funcs->submit(gpu, submit); 554 spin_unlock(&ring->submit_lock); 555 } 556 } 557 558 mutex_unlock(&dev->struct_mutex); 559 560 msm_gpu_retire(gpu); 561 } 562 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/[email protected]
.config.gz
Description: application/gzip
