Hi Hyun, Thank you for the patch.
On Wed, Jul 29, 2020 at 04:30:45PM -0700, Hyun Kwon wrote: > Use switch - case to downshift from the current link rate. It's a small > loop now, so fine to be replaced with switch - case. With a loop, it is > confusing and hard to follow as reported below. > > The patch d76271d22694: "drm: xlnx: DRM/KMS driver for Xilinx ZynqMP > DisplayPort Subsystem" from Jul 7, 2018, leads to the following > static checker warning: > > drivers/gpu/drm/xlnx/zynqmp_dp.c:594 zynqmp_dp_mode_configure() > error: iterator underflow 'bws' (-1)-2 > > Reported-by: Dan Carpenter <[email protected]> > Signed-off-by: Hyun Kwon <[email protected]> > --- > v2 > - Convert the for loop into switch - case > --- > --- > drivers/gpu/drm/xlnx/zynqmp_dp.c | 29 ++++++++++++++++------------- > 1 file changed, 16 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c > b/drivers/gpu/drm/xlnx/zynqmp_dp.c > index b735072..5d6adeaa 100644 > --- a/drivers/gpu/drm/xlnx/zynqmp_dp.c > +++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c > @@ -567,34 +567,37 @@ static int zynqmp_dp_mode_configure(struct zynqmp_dp > *dp, int pclock, > u8 current_bw) > { > int max_rate = dp->link_config.max_rate; > - u8 bws[3] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7, DP_LINK_BW_5_4 }; > + u8 bw_code; > u8 max_lanes = dp->link_config.max_lanes; > u8 max_link_rate_code = drm_dp_link_rate_to_bw_code(max_rate); > u8 bpp = dp->config.bpp; > u8 lane_cnt; > - s8 i; > > - if (current_bw == DP_LINK_BW_1_62) { > + /* Downshift from current one */ Maybe "Downshift from the current bandwidth" ? Reviewed-by: Laurent Pinchart <[email protected]> > + switch (current_bw) { > + case DP_LINK_BW_5_4: > + bw_code = DP_LINK_BW_2_7; > + break; > + case DP_LINK_BW_2_7: > + bw_code = DP_LINK_BW_1_62; > + break; > + case DP_LINK_BW_1_62: > dev_err(dp->dev, "can't downshift. already lowest link rate\n"); > return -EINVAL; > - } > - > - for (i = ARRAY_SIZE(bws) - 1; i >= 0; i--) { > - if (current_bw && bws[i] >= current_bw) > - continue; > - > - if (bws[i] <= max_link_rate_code) > - break; > + default: > + /* If not given, start with max supported */ > + bw_code = max_link_rate_code; > + break; > } > > for (lane_cnt = 1; lane_cnt <= max_lanes; lane_cnt <<= 1) { > int bw; > u32 rate; > > - bw = drm_dp_bw_code_to_link_rate(bws[i]); > + bw = drm_dp_bw_code_to_link_rate(bw_code); > rate = zynqmp_dp_max_rate(bw, lane_cnt, bpp); > if (pclock <= rate) { > - dp->mode.bw_code = bws[i]; > + dp->mode.bw_code = bw_code; > dp->mode.lane_cnt = lane_cnt; > dp->mode.pclock = pclock; > return dp->mode.bw_code; -- Regards, Laurent Pinchart _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
