Hi Rob,
On Thu, Sep 26, 2019 at 09:15:01AM -0500, Rob Herring wrote:
> On Wed, Sep 25, 2019 at 6:56 PM Laurent Pinchart wrote:
> >
> > From: Hyun Kwon <[email protected]>
> >
> > The bindings describe the ZynqMP DP subsystem. They don't support the
> > interface with the programmable logic (FPGA) or audio yet.
> >
> > Signed-off-by: Hyun Kwon <[email protected]>
> > Signed-off-by: Laurent Pinchart <[email protected]>
> > ---
> > Changes since v8:
> >
> > - Convert to yaml
> > - Rename aclk to dp_apb_clk
>
> /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.example.dt.yaml:
> display@fd4a0000: clock-names:2: 'dp_vtc_pixel_clk_in' was expected
If you allow me to steal a bit of your brain time, could you help me
expressing the clocks constraint ?
clocks:
description:
The AXI clock and at least one video clock are mandatory, the audio clock
optional.
minItems: 2
maxItems: 4
items:
- description: AXI clock
- description: Audio clock
- description: Non-live video clock (from Processing System)
- description: Live video clock (from Programmable Logic)
clock-names:
minItems: 2
maxItems: 4
items:
- const: dp_apb_clk
- const: dp_aud_clk
- const: dp_vtc_pixel_clk_in
- const: dp_live_video_in_clk
dp_apb_clk is required, dp_aud_clk is optional, and at least one of
dp_vtc_pixel_clk_in and dp_live_video_in_clk is required.
--
Regards,
Laurent Pinchart
_______________________________________________
dri-devel mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/dri-devel
