Dne četrtek, 28. junij 2018 ob 04:22:36 CEST je Chen-Yu Tsai napisal(a): > On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <[email protected]> wrote: > > Current DW HDMI PHY code never prepares and enables PHY clock after it is > > created. It's just used as it is. This may work in some cases, but it's > > clearly wrong. Fix it by adding proper calls to enable/disable PHY > > clock. > > > > Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant") > > > > Signed-off-by: Jernej Skrabec <[email protected]> > > So why does it work on the H3? Because there's only one PLL that the whole > display pipeline uses? > > We should probably tag this for stable. So, > > Cc: <[email protected]> > Reviewed-by: Chen-Yu Tsai <[email protected]>
Same question as before, how this should be handled? Can I send separate patch with same content to stable ML only? Best regards, Jernej _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
