On Mon, Feb 26, 2018 at 01:08:20PM +0530, Sharat Masetty wrote: > This patch adds a bit of infrastructure to give the different Adreno > targets the flexibility to setup the submitqueues per their needs.
Reviewed-by: Jordan Crouse <[email protected]> > Signed-off-by: Sharat Masetty <[email protected]> > --- > drivers/gpu/drm/msm/msm_gpu.h | 7 +++++++ > drivers/gpu/drm/msm/msm_submitqueue.c | 15 +++++++++++++-- > 2 files changed, 20 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h > index b824117..b9b86ef 100644 > --- a/drivers/gpu/drm/msm/msm_gpu.h > +++ b/drivers/gpu/drm/msm/msm_gpu.h > @@ -69,6 +69,10 @@ struct msm_gpu_funcs { > int (*debugfs_init)(struct msm_gpu *gpu, struct drm_minor *minor); > #endif > int (*gpu_busy)(struct msm_gpu *gpu, uint64_t *value); > + int (*submitqueue_setup)(struct msm_gpu *gpu, > + struct msm_gpu_submitqueue *queue); > + void (*submitqueue_close)(struct msm_gpu *gpu, > + struct msm_gpu_submitqueue *queue); > }; > > struct msm_gpu { > @@ -173,6 +177,9 @@ struct msm_gpu_submitqueue { > int faults; > struct list_head node; > struct kref ref; > + struct msm_gpu *gpu; > + struct drm_gem_object *bo; > + uint64_t bo_iova; > }; > > static inline void gpu_write(struct msm_gpu *gpu, u32 reg, u32 data) > diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c > b/drivers/gpu/drm/msm/msm_submitqueue.c > index 5115f75..1e696da 100644 > --- a/drivers/gpu/drm/msm/msm_submitqueue.c > +++ b/drivers/gpu/drm/msm/msm_submitqueue.c > @@ -18,6 +18,10 @@ void msm_submitqueue_destroy(struct kref *kref) > { > struct msm_gpu_submitqueue *queue = container_of(kref, > struct msm_gpu_submitqueue, ref); > + struct msm_gpu *gpu = queue->gpu; > + > + if (gpu && gpu->funcs->submitqueue_close) > + gpu->funcs->submitqueue_close(gpu, queue); > > kfree(queue); > } > @@ -65,6 +69,7 @@ int msm_submitqueue_create(struct drm_device *drm, struct > msm_file_private *ctx, > { > struct msm_drm_private *priv = drm->dev_private; > struct msm_gpu_submitqueue *queue; > + struct msm_gpu *gpu = priv->gpu; > > if (!ctx) > return -ENODEV; > @@ -77,11 +82,14 @@ int msm_submitqueue_create(struct drm_device *drm, struct > msm_file_private *ctx, > kref_init(&queue->ref); > queue->flags = flags; > > - if (priv->gpu) { > - if (prio >= priv->gpu->nr_rings) > + if (gpu) { > + if (prio >= gpu->nr_rings) { > + kfree(queue); > return -EINVAL; > + } > > queue->prio = prio; > + queue->gpu = gpu; > } > > write_lock(&ctx->queuelock); > @@ -95,6 +103,9 @@ int msm_submitqueue_create(struct drm_device *drm, struct > msm_file_private *ctx, > > write_unlock(&ctx->queuelock); > > + if (gpu && gpu->funcs->submitqueue_setup) > + gpu->funcs->submitqueue_setup(gpu, queue); > + > return 0; > } > > -- > 1.9.1 > > _______________________________________________ > Freedreno mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/freedreno -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
