The OF graph is not needed because the panel is a child of dsi. So added the burst and esc clock frequency properties to the parent (DSI node), taking into account the bisectability problem so that remove the OF graph from DSI node.
Signed-off-by: Hoegeun Kwon <[email protected]> Reviewed-by: Andrzej Hajda <[email protected]> --- arch/arm/boot/dts/exynos3250-rinato.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/exynos3250-rinato.dts b/arch/arm/boot/dts/exynos3250-rinato.dts index 548413e..c9f191c 100644 --- a/arch/arm/boot/dts/exynos3250-rinato.dts +++ b/arch/arm/boot/dts/exynos3250-rinato.dts @@ -215,6 +215,8 @@ &dsi_0 { vddcore-supply = <&ldo6_reg>; vddio-supply = <&ldo6_reg>; + samsung,burst-clock-frequency = <250000000>; + samsung,esc-clock-frequency = <20000000>; samsung,pll-clock-frequency = <24000000>; status = "okay"; -- 1.9.1 _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
