On Wed, Aug 24, 2011 at 4:00 PM, <[email protected]> wrote: > From: Jerome Glisse <[email protected]> > > For some reason SPI block is in broken state after module > unloading. This lead to broken rendering after reloading > module. Fix this by reseting SPI block in CP resume function
Looks good to me. Reviewed-by: Alex Deucher <[email protected]> > > Signed-off-by: Jerome Glisse <[email protected] > --- > drivers/gpu/drm/radeon/evergreen.c | 1 + > drivers/gpu/drm/radeon/ni.c | 1 + > 2 files changed, 2 insertions(+), 0 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/evergreen.c > b/drivers/gpu/drm/radeon/evergreen.c > index fb5fa08..d8d71a3 100644 > --- a/drivers/gpu/drm/radeon/evergreen.c > +++ b/drivers/gpu/drm/radeon/evergreen.c > @@ -1357,6 +1357,7 @@ int evergreen_cp_resume(struct radeon_device *rdev) > SOFT_RESET_PA | > SOFT_RESET_SH | > SOFT_RESET_VGT | > + SOFT_RESET_SPI | > SOFT_RESET_SX)); > RREG32(GRBM_SOFT_RESET); > mdelay(15); > diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c > index 44c4750..a2e00fa 100644 > --- a/drivers/gpu/drm/radeon/ni.c > +++ b/drivers/gpu/drm/radeon/ni.c > @@ -1159,6 +1159,7 @@ int cayman_cp_resume(struct radeon_device *rdev) > SOFT_RESET_PA | > SOFT_RESET_SH | > SOFT_RESET_VGT | > + SOFT_RESET_SPI | > SOFT_RESET_SX)); > RREG32(GRBM_SOFT_RESET); > mdelay(15); > -- > 1.7.1 > > _______________________________________________ > dri-devel mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/dri-devel > _______________________________________________ dri-devel mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/dri-devel
