Hi all,

I've wanted to make the core.atomic implementation for DMD suck less for a long 
time now. One of its main problems is that DMD cannot inline the functions even 
when no barrier is required. On x86, barriers are only needed for sequentially 
consistent stores. All other loads and stores can be implemented as simple movs 
(not talking about rmw operations here).

With 2.067 the volatileLoad and volatileStore intrinsics were added, which are 
directly lowered to loads and stores. Is DMD's optimizer overly conservative 
here and prohibits *all* code motion across these (we only require them not to 
be reordered with atomic ops)? If so, this would be a good thing for once, as I 
could then efficiently implement the no-barrier case using them.

LDC of course just lowers the atomic ops to their LLVM IR counterparts.

Best,
DavidĀ 




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