Hi @Julien
Seems like we are working on a similar problem! We have been actively trying to port TVM to our own accelerated RISC-V microcontroller. Check out: https://discuss.tvm.apache.org/t/feedback-on-tvm-port-to-custom-accelerator/9548?u=jossevandelm I'm also very interested in @areusch 's feedback on our post. @jknight we currently do the codegen to the accelerator through C code with the help of an inhouse library and a lot of tensorization in TE. We don't know if this approach is the best way to go about it though. Right now a lot of accelerator details are abstracted away in the library in a suboptimal way, just to get something working in a straightforward (ver 0) way with TVM. I currently think the biggest hurdle for us is that some hardware accelerator designs choices rely on very specific optimizations or mapping strategies from a compiler that are not always readily available. But these HW design decisions can often make or break performance. So in my experience (at this moment) the time it takes for porting TVM heavily relies on what software is already available for your accelerator, the accelerator design itself etc etc . --- [Visit Topic](https://discuss.tvm.apache.org/t/tvm-and-custom-accelerators/9525/7) to respond. You are receiving this because you enabled mailing list mode. To unsubscribe from these emails, [click here](https://discuss.tvm.apache.org/email/unsubscribe/00eed5ca37b94764e188171844ac89f978f4ac5c4db9a09fde99192af728cdd2).
