From: Tyler Miller <tyler.mil...@airbusus.com>
---
bsps/arm/tms570/include/bsp/tms570_hwinit.h | 14 +-
bsps/arm/tms570/start/hwinit-lc4357-hdk.c | 139 ++++++++++++++++++
bsps/arm/tms570/start/hwinit-ls3137-hdk.c | 102 +++++++++++++
bsps/arm/tms570/start/init_system.c | 56 -------
spec/build/bsps/arm/tms570/objhwinit.yml | 9 +-
.../bsps/arm/tms570/objhwinitlc4357hdk.yml | 14 ++
.../bsps/arm/tms570/objhwinitls3137hdk.yml | 14 ++
7 files changed, 287 insertions(+), 61 deletions(-)
create mode 100644 bsps/arm/tms570/start/hwinit-lc4357-hdk.c
create mode 100644 bsps/arm/tms570/start/hwinit-ls3137-hdk.c
create mode 100644 spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
create mode 100644 spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml
diff --git a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
index f23584f9b1..2a178ceb05 100644
--- a/bsps/arm/tms570/include/bsp/tms570_hwinit.h
+++ b/bsps/arm/tms570/include/bsp/tms570_hwinit.h
@@ -10,6 +10,7 @@
*/
/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
* Copyright (C) 2014 Premysl Houdek <kom541...@gmail.com>
*
* Google Summer of Code 2014 at
@@ -70,9 +71,7 @@ void _mpuInit_( void );
void tms570_emif_sdram_init( void );
void tms570_memory_init( uint32_t ram );
-void tms570_system_hw_init( void );
void tms570_pinmux_init( void );
-void tms570_pll_init( void );
void tms570_trim_lpo_init( void );
void tms570_flash_init( void );
void tms570_periph_init( void );
@@ -80,4 +79,15 @@ void tms570_map_clock_init( void );
void tms570_system_hw_init( void );
void tms570_esm_init( void );
+/*
+ * The following functions that must be implemented on a per-board basis for
+ * any BSP variant with hardware initialization. These configure MCU
+ * peripherals that are specific to a particular board.
+ */
+
+/**
+ * @brief Initialize PLLs source divider/multipliers.
+ */
+void tms570_pll_init(void);
+
#endif /* LIBBSP_ARM_TMS570_HWINIT_H */
diff --git a/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
new file mode 100644
index 0000000000..6a8a2f1a86
--- /dev/null
+++ b/bsps/arm/tms570/start/hwinit-lc4357-hdk.c
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This source file contains parts of the system initialization.
+ */
+
+/*
+ * Copyright (C) 2022 Airbus U.S. Space & Defense, Inc
+ * Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <bsp/tms570.h>
+#include <bsp/tms570_hwinit.h>
+
+typedef enum Tms570ClockDisableSources {
+ TMS570_CLKDIS_SRC_OSC = 0x01, ///< External high-speed oscillator as
clock source
+ TMS570_CLKDIS_SRC_PLL1 = 0x02,
+ TMS570_CLKDIS_SRC_RESERVED = 0x04, ///< reserved. not tied to actual clock
source
+ TMS570_CLKDIS_SRC_EXT_CLK1 = 0x08,
+ TMS570_CLKDIS_SRC_LOW_FREQ_LPO = 0x10,
+ TMS570_CLKDIS_SRC_HIGH_FREQ_LPO = 0x20,
+ TMS570_CLKDIS_SRC_PLL2 = 0x40,
+ TMS570_CLKDIS_SRC_EXT_CLK2 = 0x80,
+} Tms570ClockDisableSources;
+
+// Source selection for G, H, and V clocks SYS1.GHVSRC reg
+typedef enum Tms570GhvClockSources {
+ TMS570_SYS_CLK_SRC_OSC = 0U, /**< Alias for oscillator clock Source
*/
+ TMS570_SYS_CLK_SRC_PLL1 = 1U, /**< Alias for Pll1 clock Source
*/
+ TMS570_SYS_CLK_SRC_EXTERNAL1 = 3U, /**< Alias for external clock Source
*/
+ TMS570_SYS_CLK_SRC_LPO_LOW = 4U, /**< Alias for low power oscillator
low clock Source */
+ TMS570_SYS_CLK_SRC_LPO_HIGH = 5U, /**< Alias for low power oscillator
high clock Source */
+ TMS570_SYS_CLK_SRC_PLL2 = 6U, /**< Alias for Pll2 clock Source
*/
+ TMS570_SYS_CLK_SRC_EXTERNAL2 = 7U, /**< Alias for external 2 clock Source
*/
+ TMS570_SYS_CLK_SRC_VCLK = 9U /**< Alias for synchronous VCLK1 clock
Source */
+} Tms570GhvClockSources;
+
+/**
+ * @brief Setup all system PLLs (HCG:setupPLL)
+ *
+ */
+void tms570_pll_init( void )
+{
+ //based on HalCoGen setupPLL method
+ uint32_t pll12_dis = TMS570_CLKDIS_SRC_PLL1 | TMS570_CLKDIS_SRC_PLL2;
+
+ /* Disable PLL1 and PLL2 */
+ TMS570_SYS1.CSDISSET = pll12_dis;
+
+ /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
+ while ( ( TMS570_SYS1.CSDIS & pll12_dis ) != pll12_dis ) {
+ /* Wait */
+ }
+
+ /* Clear Global Status Register */
+ TMS570_SYS1.GLBSTAT = 0x301U;
+
+ // Configure PLL control registers
+
+ /** - Setup pll control register 1:
+ * - Disable reset on oscillator slip (ROS)
+ * - Enable bypass on pll slip
+ * TODO: desired: switches to OSC when PLL slip detected
+ * - setup Pll output clock divider to max before Lock
+ * - Disable reset on oscillator fail
+ * - Setup reference clock divider
+ * - Setup Pll multiplier
+ *
+ * - PLL1: 16MHz OSC in -> 300MHz PLL1 out
+ */
+ TMS570_SYS1.PLLCTL1 = (TMS570_SYS1_PLLCTL1_ROS * 0)
+ | (uint32_t)0x40000000U
+ | TMS570_SYS1_PLLCTL1_PLLDIV(0x1F)
+ | (TMS570_SYS1_PLLCTL1_ROF * 0)
+ | TMS570_SYS1_PLLCTL1_REFCLKDIV(4U - 1U)
+ | TMS570_SYS1_PLLCTL1_PLLMUL((75U - 1U) << 8);
+
+ /** - Setup pll control register 2
+ * - Setup spreading rate
+ * - Setup bandwidth adjustment
+ * - Setup internal Pll output divider
+ * - Setup spreading amount
+ */
+ TMS570_SYS1.PLLCTL2 = ((uint32_t)255U << 22U)
+ | ((uint32_t)7U << 12U)
+ | ((uint32_t)(1U - 1U) << 9U)
+ | 61U;
+
+ // Initialize Pll2
+
+ /** - Setup pll2 control register :
+ * - setup Pll output clock divider to max before Lock
+ * - Setup reference clock divider
+ * - Setup internal Pll output divider
+ * - Setup Pll multiplier
+ */
+ TMS570_SYS2.PLLCTL3 = TMS570_SYS2_PLLCTL3_ODPLL2(1U - 1U)
+ | TMS570_SYS2_PLLCTL3_PLLDIV2(0x1FU)
+ | TMS570_SYS2_PLLCTL3_REFCLKDIV2(8U - 1U)
+ | TMS570_SYS2_PLLCTL3_PLLMUL2(( 150U - 1U) << 8 );
+
+ // Enable PLL(s) to start up or Lock
+ // Enable all clock sources except the following
+ TMS570_SYS1.CSDIS = (TMS570_CLKDIS_SRC_EXT_CLK2 |
TMS570_CLKDIS_SRC_EXT_CLK1 | TMS570_CLKDIS_SRC_RESERVED);
+}
diff --git a/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
new file mode 100644
index 0000000000..772352470f
--- /dev/null
+++ b/bsps/arm/tms570/start/hwinit-ls3137-hdk.c
@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSBSPsARMTMS570
+ *
+ * @brief This source file contains parts of the system initialization.
+ */
+
+/*
+ * Copyright (C) 2009-2015 Texas Instruments Incorporated - www.ti.com
+ *
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the
+ * distribution.
+ *
+ * Neither the name of Texas Instruments Incorporated nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <bsp/tms570.h>
+#include <bsp/tms570_hwinit.h>
+
+/**
+ * @brief Setup all system PLLs (HCG:setupPLL)
+ *
+ */
+void tms570_pll_init( void )
+{
+ uint32_t pll12_dis = 0x42;
+
+ /* Disable PLL1 and PLL2 */
+ TMS570_SYS1.CSDISSET = pll12_dis;
+
+ /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
+ while ( ( TMS570_SYS1.CSDIS & pll12_dis ) != pll12_dis ) {
+ /* Wait */
+ }
+
+ /* Clear Global Status Register */
+ TMS570_SYS1.GLBSTAT = TMS570_SYS1_GLBSTAT_FBSLIP |
+ TMS570_SYS1_GLBSTAT_RFSLIP |
+ TMS570_SYS1_GLBSTAT_OSCFAIL;
+ /** - Configure PLL control registers */
+ /** @b Initialize @b Pll1: */
+
+ /* Setup pll control register 1 */
+ TMS570_SYS1.PLLCTL1 = TMS570_SYS1_PLLCTL1_ROS * 0 |
+ TMS570_SYS1_PLLCTL1_MASK_SLIP( 1 ) |
+ TMS570_SYS1_PLLCTL1_PLLDIV( 0x1f ) | /* max value */
+ TMS570_SYS1_PLLCTL1_ROF * 0 |
+ TMS570_SYS1_PLLCTL1_REFCLKDIV( 6 - 1 ) |
+ TMS570_SYS1_PLLCTL1_PLLMUL( ( 120 - 1 ) << 8 );
+
+ /* Setup pll control register 2 */
+ TMS570_SYS1.PLLCTL2 = TMS570_SYS1_PLLCTL2_FMENA * 0 |
+ TMS570_SYS1_PLLCTL2_SPREADINGRATE( 255 ) |
+ TMS570_SYS1_PLLCTL2_MULMOD( 7 ) |
+ TMS570_SYS1_PLLCTL2_ODPLL( 2 - 1 ) |
+ TMS570_SYS1_PLLCTL2_SPR_AMOUNT( 61 );
+
+ /** @b Initialize @b Pll2: */
+
+ /* Setup pll2 control register */
+ TMS570_SYS2.PLLCTL3 = TMS570_SYS2_PLLCTL3_ODPLL2( 2 - 1 ) |
+ TMS570_SYS2_PLLCTL3_PLLDIV2( 0x1F ) | /* max value */
+ TMS570_SYS2_PLLCTL3_REFCLKDIV2( 6 - 1 ) |
+ TMS570_SYS2_PLLCTL3_PLLMUL2( ( 120 - 1 ) << 8 );
+
+ /** - Enable PLL(s) to start up or Lock */
+ TMS570_SYS1.CSDIS = 0x00000000 | /* CLKSR0 on */
+ 0x00000000 | /* CLKSR1 on */
+ 0x00000008 | /* CLKSR3 off */
+ 0x00000000 | /* CLKSR4 on */
+ 0x00000000 | /* CLKSR5 on */
+ 0x00000000 | /* CLKSR6 on */
+ 0x00000080; /* CLKSR7 off */
+}
diff --git a/bsps/arm/tms570/start/init_system.c
b/bsps/arm/tms570/start/init_system.c
index a384959d4a..b5387bfbc2 100644
--- a/bsps/arm/tms570/start/init_system.c
+++ b/bsps/arm/tms570/start/init_system.c
@@ -50,62 +50,6 @@
#include <bsp/tms570_selftest.h>
#include <bsp/tms570_hwinit.h>
-/**
- * @brief Setup all system PLLs (HCG:setupPLL)
- *
- */
-void tms570_pll_init( void )
-{
- uint32_t pll12_dis = 0x42;
-
- /* Disable PLL1 and PLL2 */
- TMS570_SYS1.CSDISSET = pll12_dis;
-
- /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Hardware status bit read check" */
- while ( ( TMS570_SYS1.CSDIS & pll12_dis ) != pll12_dis ) {
- /* Wait */
- }
-
- /* Clear Global Status Register */
- TMS570_SYS1.GLBSTAT = TMS570_SYS1_GLBSTAT_FBSLIP |
- TMS570_SYS1_GLBSTAT_RFSLIP |
- TMS570_SYS1_GLBSTAT_OSCFAIL;
- /** - Configure PLL control registers */
- /** @b Initialize @b Pll1: */
-
- /* Setup pll control register 1 */
- TMS570_SYS1.PLLCTL1 = TMS570_SYS1_PLLCTL1_ROS * 0 |
- TMS570_SYS1_PLLCTL1_MASK_SLIP( 1 ) |
- TMS570_SYS1_PLLCTL1_PLLDIV( 0x1f ) | /* max value */
- TMS570_SYS1_PLLCTL1_ROF * 0 |
- TMS570_SYS1_PLLCTL1_REFCLKDIV( 6 - 1 ) |
- TMS570_SYS1_PLLCTL1_PLLMUL( ( 120 - 1 ) << 8 );
-
- /* Setup pll control register 2 */
- TMS570_SYS1.PLLCTL2 = TMS570_SYS1_PLLCTL2_FMENA * 0 |
- TMS570_SYS1_PLLCTL2_SPREADINGRATE( 255 ) |
- TMS570_SYS1_PLLCTL2_MULMOD( 7 ) |
- TMS570_SYS1_PLLCTL2_ODPLL( 2 - 1 ) |
- TMS570_SYS1_PLLCTL2_SPR_AMOUNT( 61 );
-
- /** @b Initialize @b Pll2: */
-
- /* Setup pll2 control register */
- TMS570_SYS2.PLLCTL3 = TMS570_SYS2_PLLCTL3_ODPLL2( 2 - 1 ) |
- TMS570_SYS2_PLLCTL3_PLLDIV2( 0x1F ) | /* max value */
- TMS570_SYS2_PLLCTL3_REFCLKDIV2( 6 - 1 ) |
- TMS570_SYS2_PLLCTL3_PLLMUL2( ( 120 - 1 ) << 8 );
-
- /** - Enable PLL(s) to start up or Lock */
- TMS570_SYS1.CSDIS = 0x00000000 | /* CLKSR0 on */
- 0x00000000 | /* CLKSR1 on */
- 0x00000008 | /* CLKSR3 off */
- 0x00000000 | /* CLKSR4 on */
- 0x00000000 | /* CLKSR5 on */
- 0x00000000 | /* CLKSR6 on */
- 0x00000080; /* CLKSR7 off */
-}
-
/**
* @brief Adjust Low-Frequency (LPO) oscilator (HCG:trimLPO)
*
diff --git a/spec/build/bsps/arm/tms570/objhwinit.yml
b/spec/build/bsps/arm/tms570/objhwinit.yml
index 8cd5d0d393..f6c02ec1d9 100644
--- a/spec/build/bsps/arm/tms570/objhwinit.yml
+++ b/spec/build/bsps/arm/tms570/objhwinit.yml
@@ -5,14 +5,17 @@ copyrights:
- Copyright (C) 2020 embedded brains GmbH & Co. KG
cppflags: []
cxxflags: []
-enabled-by:
-- TMS570_USE_HWINIT_STARTUP
+enabled-by: TMS570_USE_HWINIT_STARTUP
includes: []
install:
- destination: ${BSP_INCLUDEDIR}/bsp/ti_herc
source:
- bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h
-links: []
+links:
+- role: build-dependency
+ uid: objhwinitls3137hdk
+- role: build-dependency
+ uid: objhwinitlc4357hdk
source:
- bsps/arm/tms570/start/bspstarthooks.c
- bsps/arm/tms570/start/bspstarthooks-hwinit.c
diff --git a/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
b/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
new file mode 100644
index 0000000000..1b91475804
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by: arm/tms570lc4357_hdk
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/tms570/start/hwinit-lc4357-hdk.c
+type: build
diff --git a/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml
b/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml
new file mode 100644
index 0000000000..9971a0a86f
--- /dev/null
+++ b/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml
@@ -0,0 +1,14 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+build-type: objects
+cflags: []
+copyrights:
+- Copyright (C) 2023 embedded brains GmbH & Co. KG
+cppflags: []
+cxxflags: []
+enabled-by: arm/tms570ls3137_hdk
+includes: []
+install: []
+links: []
+source:
+- bsps/arm/tms570/start/hwinit-ls3137-hdk.c
+type: build
--
2.35.3
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