OK, but please see the comment below.
On 2023-09-21 17:19, Sebastian Huber wrote:
Update #4954.
---
bsps/sparc/leon3/start/cpucounter.c | 62 ++++++++++++++++++++--
spec/build/bsps/sparc/leon3/grp.yml | 2 +
spec/build/bsps/sparc/leon3/optdsubase.yml | 24 +++++++++
3 files changed, 84 insertions(+), 4 deletions(-)
create mode 100644 spec/build/bsps/sparc/leon3/optdsubase.yml
diff --git a/bsps/sparc/leon3/start/cpucounter.c
b/bsps/sparc/leon3/start/cpucounter.c
index db4f566021..35db839cd4 100644
--- a/bsps/sparc/leon3/start/cpucounter.c
+++ b/bsps/sparc/leon3/start/cpucounter.c
@@ -77,7 +77,57 @@ RTEMS_ALIAS(_CPU_Counter_read) uint32_t
_SPARC_Counter_read_ISR_disabled(void);
#define LEON3_GET_TIMECOUNT_INIT leon3_timecounter_get_processor_up_counter
-#else /* !LEON3_HAS_ASR_22_23_UP_COUNTER */
+#elif defined(LEON3_DSU_BASE)
+
+/*
+ * In general, using the Debug Support Unit (DSU) is not recommended. Before
+ * you use it, check that it is available in flight models and that the time
+ * tag register is implemented in radiation hardened flip-flops. For the
+ * GR712RC, this is the case.
+ */
+
+/* This value is specific to the GR712RC */
+#define LEON3_DSU_TIME_TAG_ZERO_BITS 2
Yes the GR712RC is an exception in that the DSU timetag counter can be
used. The comment (also in optdsubase.yml) is appropriate.
Implementation is OK.
I would recommend to rework the symbol LEON3_DSU_BASE into something
less generic, so that this is not activated by mistake. For example
"LEON3_USE_GR712RC_DSU_COUNTER", or use an additional condition like "&&
defined(RTEMS_BSP_GR712RC)". Another option would be to "#error" out if
building a non-GR712RC BSP.
--
Best regards,
Martin Åberg
Software Engineer
Frontgrade Gaisler
martin.ab...@gaisler.com
Frontgrade Gaisler AB, Kungsgatan 12, SE-411 19 GÖTEBORG, Sweden.
+46 (0) 31 775 8650, www.gaisler.com
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