On 11.10.23 17:28, Sam Price wrote:
on microblaze there is an operation that destroys the msr on interrupt task switches. (addi needs switched to addik). I was trying to add a single processor 78 test to detect this, could someone review?
The right test case to detect errors like this is spcontext01 which uses two functions provided by the CPU port:
void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); Maybe cpukit/score/cpu/microblaze/microblaze-context-validate.S could be improved to check also the msr? -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/ _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
