Build the arm libdebugger support only for supported ARM architectures. This fixes assembler errors at -O0.
Close #4939. --- cpukit/libdebugger/rtems-debugger-arm.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/cpukit/libdebugger/rtems-debugger-arm.c b/cpukit/libdebugger/rtems-debugger-arm.c index cdc615ce64..0d1ad6c63a 100644 --- a/cpukit/libdebugger/rtems-debugger-arm.c +++ b/cpukit/libdebugger/rtems-debugger-arm.c @@ -281,6 +281,7 @@ do { \ */ RTEMS_INTERRUPT_LOCK_DEFINE(static, target_lock, "target_lock") +#if ARM_CP15 /** * An exception offset is added to the return address of the PC on an * exception's stack frame. The PC needs to be adjusted. @@ -292,6 +293,7 @@ static const size_t exc_offsets[2][5] = /* TMB undef_ins sup call pref abt data abt */ { 0, 2, 0, 4, 8 } }; +#endif /** * Is a session active? @@ -1156,6 +1158,7 @@ arm_debug_break_c14_write_value(int bp, uint32_t value) } } +#if ARM_CP15 static uint32_t arm_debug_dbgdscr_read(void) { @@ -1185,6 +1188,7 @@ arm_debug_method_of_entry(void) { return (arm_debug_dbgdscr_read() >> 2) & 0xf; } +#endif static void arm_debug_disable_interrupts(void) @@ -1192,11 +1196,13 @@ arm_debug_disable_interrupts(void) debug_disable_ints = 1; } +#if ARM_CP15 static void arm_debug_enable_interrupts(void) { arm_debug_dbgdscr_write(arm_debug_dbgdscr_read() & ~(1 << 11)); } +#endif static void arm_debug_break_clear(int bp) @@ -1290,6 +1296,7 @@ arm_debug_break_exec_enable(int bp, uintptr_t addr, bool thumb, bool step) { ARM_HW_BP_PRIV_PL0_SUP_SYS); } +#if ARM_CP15 static void arm_debug_break_dump(void) { @@ -1303,6 +1310,7 @@ arm_debug_break_dump(void) } #endif } +#endif #if NOT_USED_BUT_KEEPING static size_t @@ -1331,6 +1339,7 @@ rtems_debugger_target_configure(rtems_debugger_target* target) return arm_debug_probe(target); } +#if ARM_CP15 static void target_print_frame(CPU_Exception_frame* frame) { @@ -1348,13 +1357,9 @@ static void target_exception(CPU_Exception_frame* frame) { #if TARGET_DEBUG -#if ARM_CP15 const uint32_t ifsr = arm_cp15_get_instruction_fault_status(); const uint32_t dfsr = arm_cp15_get_data_fault_status(); const void* far = arm_cp15_get_fault_address(); -#else - const uint32_t ifsr = 0; -#endif const uint32_t mvector = frame->vector; const uint32_t dbgdscr = arm_debug_dbgdscr_read(); #endif @@ -1468,7 +1473,6 @@ target_exception(CPU_Exception_frame* frame) * * Set all the break point registers to 0. Enable interrupts. */ -#if ARM_CP15 #define ARM_HW_BP_UNLOAD(_bp) \ "cmp r0, #" #_bp "\n" \ "ble 3f\n" \ @@ -1830,7 +1834,6 @@ arm_debug_unlock_abort(void) ARM_SWITCH_BACK; longjmp(unlock_abort_jmpbuf, -1); } -#endif static void __attribute__((naked)) target_exception_undefined_instruction(void) @@ -1882,7 +1885,6 @@ target_exception_data_abort(void) EXCEPTION_EXIT(frame); } -#if ARM_CP15 #if __ARM_ARCH_PROFILE == 'A' /** * The init value for the text section. @@ -1933,14 +1935,6 @@ rtems_debugger_target_set_vectors(void) /* * Dummy, please add support for your ARM variant. */ - void* ui = target_exception_undefined_instruction; - void* sc = target_exception_supervisor_call; - void* pa = target_exception_prefetch_abort; - void* da = target_exception_data_abort; - (void) ui; - (void) sc; - (void) pa; - (void) da; } static void -- 2.35.3 _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel