Hello Kinsey,
I think the patch looks good, although I've not verified precise
PIN/REGs assignment value. I trust you test this somehow otherwise you
would not submit it. And this steers my curiosity. The only board (from
ST Micro) I know which provides connection to UART7 is stm32h735g-dk
which is not supported by RTEMS due to missing MCU support in old HAL
code. I submitted new HAL patches last week but they are not in yet. So
if this is not company secrete let me ask, what board you are using with
UART7 connection?
Thanks,
Karel
On 7/24/23 20:28, Kinsey Moore wrote:
This change allows for the pins assigned to UART7 to be reconfigured via
config.ini.
---
bsps/arm/stm32h7/console/console-uart7-cfg.c | 4 ++--
spec/build/bsps/arm/stm32h7/grp.yml | 4 ++++
.../build/bsps/arm/stm32h7/optuart7gpiopins.yml | 17 +++++++++++++++++
.../build/bsps/arm/stm32h7/optuart7gpioregs.yml | 17 +++++++++++++++++
4 files changed, 40 insertions(+), 2 deletions(-)
create mode 100644 spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml
create mode 100644 spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml
diff --git a/bsps/arm/stm32h7/console/console-uart7-cfg.c
b/bsps/arm/stm32h7/console/console-uart7-cfg.c
index dca19e652d..2ced4cf9c2 100644
--- a/bsps/arm/stm32h7/console/console-uart7-cfg.c
+++ b/bsps/arm/stm32h7/console/console-uart7-cfg.c
@@ -33,9 +33,9 @@
const stm32h7_uart_config stm32h7_uart7_config = {
.gpio = {
- .regs = GPIOB,
+ .regs = STM32H7_UART7_GPIO_REGS,
.config = {
- .Pin = GPIO_PIN_3 | GPIO_PIN_4,
+ .Pin = STM32H7_UART7_GPIO_PINS,
.Mode = GPIO_MODE_AF_PP,
.Pull = GPIO_NOPULL,
.Speed = GPIO_SPEED_FREQ_LOW,
diff --git a/spec/build/bsps/arm/stm32h7/grp.yml
b/spec/build/bsps/arm/stm32h7/grp.yml
index 595762c665..239df9b898 100644
--- a/spec/build/bsps/arm/stm32h7/grp.yml
+++ b/spec/build/bsps/arm/stm32h7/grp.yml
@@ -106,6 +106,10 @@ links:
uid: optusart3gpiopins
- role: build-dependency
uid: optusart3gpioregs
+- role: build-dependency
+ uid: optuart7gpiopins
+- role: build-dependency
+ uid: optuart7gpioregs
- role: build-dependency
uid: optvariant
- role: build-dependency
diff --git a/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml
b/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml
new file mode 100644
index 0000000000..0252bdab7c
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research (OAR)
+default:
+- enabled-by: true
+ value: ( GPIO_PIN_3 | GPIO_PIN_4 )
+description: |
+ GPIO pins used for the UART7 pin configuration.
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_UART7_GPIO_PINS
+type: build
diff --git a/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml
b/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml
new file mode 100644
index 0000000000..16ce3bf526
--- /dev/null
+++ b/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- define-unquoted: null
+build-type: option
+copyrights:
+- Copyright (C) 2023 On-Line Applications Research (OAR)
+default:
+- enabled-by: true
+ value: GPIOB
+description: |
+ GPIO registers used for the UART7 pin configuration.
+enabled-by: true
+format: '{}'
+links: []
+name: STM32H7_UART7_GPIO_REGS
+type: build
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