[PATCH Resend] bsps/riscv: Clear interrupt complete before disable

[Padmarao Begari]

The interrupt complete should clear with the interrupt
number before disabling the interrupt in the PLIC to
get the next interrupt.
---
 bsps/riscv/riscv/irq/irq.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/bsps/riscv/riscv/irq/irq.c b/bsps/riscv/riscv/irq/irq.c
index e8d297052b..8e72bd8da5 100644
--- a/bsps/riscv/riscv/irq/irq.c
+++ b/bsps/riscv/riscv/irq/irq.c
@@ -585,6 +585,8 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
 
 #ifdef RTEMS_SMP
     if (enable != NULL) {
+      cpu = _Per_CPU_Get_by_index(_CPU_SMP_Get_current_processor());
+      cpu->cpu_per_cpu.plic_hart_regs->claim_complete = interrupt_index;
       enable[group] &= ~bit;
     } else {
       uint32_t cpu_max;
@@ -595,6 +597,7 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
       for (cpu_index = 0; cpu_index < cpu_max; ++cpu_index) {
         cpu = _Per_CPU_Get_by_index(cpu_index);
         enable = cpu->cpu_per_cpu.plic_m_ie;
+        cpu->cpu_per_cpu.plic_hart_regs->claim_complete = interrupt_index;
 
         if (enable != NULL) {
           enable[group] &= ~bit;
@@ -603,6 +606,7 @@ rtems_status_code 
bsp_interrupt_vector_disable(rtems_vector_number vector)
     }
 #else
     cpu = _Per_CPU_Get_by_index(0);
+    cpu->cpu_per_cpu.plic_hart_regs->claim_complete = interrupt_index;
     cpu->cpu_per_cpu.plic_m_ie[group] &= ~bit;
 #endif
 
-- 
2.25.1

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