On 6/9/2022 3:38 pm, Sebastian Huber wrote: > On 06/09/2022 07:29, Chris Johns wrote: >> On 5/9/2022 4:36 pm, Sebastian Huber wrote: >>> On 03/09/2022 01:17, Chris Johns wrote: >>>> On 2/9/2022 2:27 pm, Sebastian Huber wrote: >>>>> On 02.09.22 06:22, Sebastian Huber wrote: >>>>>> On 02.09.22 04:22, Chris Johns wrote: >>>>>>> On 1/9/2022 6:26 pm, Sebastian Huber wrote: >>>>>>>> The VRSAVE feature of the Altivec unit can be used to reduce the >>>>>>>> amount of >>>>>>>> Altivec registers which need to be saved/restored during interrupt >>>>>>>> processing >>>>>>>> and context switches. >>>>>>> Which BSPs and hardware has this been tested on? >>>>>> The e6500 QoIQ BSPs. >>>>> I mean QorIQ. We have this code since 2020 in production code. I just >>>>> forgot to >>>>> integrate it. >>>> I would like to have this tested on some of the older MVME boards. Do you >>>> still >>>> have the mvme5500 (I think)? I can look at testing in an mvme2703 this >>>> week. >>> >>> This will not work out of the box. In order to use the VRSAVE optimization, >>> you >>> need also a corresponding multilib (-mvrsave), see GCC patch. The MVME BSPs >>> use >>> a different exception and context switch code for the AltiVec support. You >>> would >>> have to convert them first to the implementation used by the QorIQ BSPs. >>> Lastly, >>> you also have add the -mvrsave flag to the ABI_FLAGS. >> >> Thank you for the explanation. This was not apparent to me so maybe >> something in >> the commit message to help anyone reviewing the change would help? > > Ok, I can add something to the commit message. >
Thanks >> >> Which BSPs does this effect? > > Only the QorIQ BSPs using the e6500 core and only if -mvrsave is added to the > ABI_FLAGS (follow up patch). Great. I think this is important and valuable information. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
