Hi, The Versal's DDRMC0 supports two separate regions. Region 0 is from 0 up to 2G where the Versal's hard IP regions start. DDR memory above the 2G mark is moved to region 1 and its base address is in the A64 address space.
The patch will place all memory up to 2G in region 0 and if more is present it is located in region 1. An MMU entry for the region 1 memory is provided and the memory is added to the heap V2: - Resolve LPDDR address alias issue in the Versal NOC DDRMC hardware configration. That was the crash I referred to in the v1 thread - Tested building aarch64/xilinx_zynqmp_ilp32_zu3eg with 64bit unexpected sections ORIGIN - Added BSP_FATAL_HEAP_EXTEND_ERROR error code - Add a heap extend BSP assert if the extend fails - Move SYSINIT to after the IDLE threads exist to provide the protected heap extend a context Tested in a vck-190 using 8G of LPDDR with malloctest: posix_memalign - alignment of 256 -- OK posix_memalign - alignment of 512 -- OK posix_memalign - alignment of 1024 -- OK posix_memalign - alignment of 2048 -- OK posix_memalign - alignment of 4096 -- OK posix_memalign - alignment of 8192 -- OK posix_memalign - alignment of 16384 -- OK posix_memalign - alignment of 32768 -- OK posix_memalign - alignment of 65536 -- OK posix_memalign - alignment of 131072 -- OK posix_memalign - alignment of 262144 -- OK posix_memalign - alignment of 524288 -- OK posix_memalign - alignment of 1048576 -- OK posix_memalign - alignment of 2097152 -- OK posix_memalign - alignment of 4194304 -- OK posix_memalign - alignment of 8388608 -- OK posix_memalign - alignment of 16777216 -- OK posix_memalign - alignment of 33554432 -- OK posix_memalign - alignment of 67108864 -- OK posix_memalign - alignment of 134217728 -- OK posix_memalign - alignment of 268435456 -- OK posix_memalign - alignment of 536870912 -- OK posix_memalign - alignment of 1073741824 -- OK posix_memalign - alignment of 2147483648 -- OK posix_memalign - alignment of 4294967296 -- OK posix_memalign - alignment of 8589934592 -- OK posix_memalign - ran out of memory trying 8589934592 Note, 4G is the largest block available as the heap is split into 2 pools. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
