On 5/1/22 5:10 am, Alex White wrote: > From: Jennifer Averett <jennifer.aver...@oarcorp.com> > > --- > .../microblaze_fpga/dts/microblaze-dtb.c | 962 ++++++++++++++++++ > .../microblaze/microblaze_fpga/dts/system.dts | 452 ++++++++ > bsps/microblaze/microblaze_fpga/fdt/bsp_fdt.c | 21 + > bsps/microblaze/microblaze_fpga/include/bsp.h | 4 + > .../bsps/microblaze/microblaze_fpga/obj.yml | 2 + > 5 files changed, 1441 insertions(+) > create mode 100644 bsps/microblaze/microblaze_fpga/dts/microblaze-dtb.c > create mode 100644 bsps/microblaze/microblaze_fpga/dts/system.dts > create mode 100644 bsps/microblaze/microblaze_fpga/fdt/bsp_fdt.c
How does a user with an FPGA microblaze implementation provide there own FDT? I see the clock speed is a setting. Is there a means to add such support available? I am OK with a specific implementation keyed into a specific BSP being in our source but that must be limited to a specific piece of hardware and FPGA is too general given this is a soft processor. I think there needs to a workflow that allows users to customize these settings for their own build. Chris _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
