Comments below.
On 10/16/2021 15:12, Gedare Bloom wrote:
---
bsps/shared/start/bspreset-arm-psci.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/bsps/shared/start/bspreset-arm-psci.c
b/bsps/shared/start/bspreset-arm-psci.c
index 215be5c9b5..bafdfe6299 100644
--- a/bsps/shared/start/bspreset-arm-psci.c
+++ b/bsps/shared/start/bspreset-arm-psci.c
@@ -37,9 +37,28 @@
#include <bsp.h>
#include <bsp/bootcard.h>
+#if defined( AARCH64_MULTILIB_ARCH_V8 ) || \
+ defined( AARCH64_MULTILIB_ARCH_V8_ILP32 )
+#include <rtems/score/aarch64-smc.h>
+#endif
+
void bsp_reset(void)
{
uint32_t PSCI_FN_SYSTEM_RESET = 0x84000009;
+#ifdef BSP_RESET_SMC
+ (void) _AArch64_SMC_Invoke(
+ PSCI_FN_SYSTEM_RESET,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ NULL
+ );
+#else
__asm__ volatile(
#if defined(AARCH64_MULTILIB_ARCH_V8) ||
defined(AARCH64_MULTILIB_ARCH_V8_ILP32)
"mov x0, %0\n"
@@ -53,4 +72,5 @@ void bsp_reset(void)
#endif
This leaves dead code just above the break in this patch.
: : "r" (PSCI_FN_SYSTEM_RESET)
);
+#endif
}
The existing PSCI functionality was coded such that both ARM and AArch64
could use it in either mode. The way this has been added breaks SMC
conduit functionality on 32-bit ARM for both secondary CPU startup and
system reset.
Kinsey
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