On 29/06/2021 21:09, Alan Cudmore wrote:
On 29/06/2021 20:56, Alan Cudmore wrote:
I understand the move in that commit now.
Maybe it's not working on the single core models because the code is
conditional for ARMV7 + A or ARMV8?
https://git.rtems.org/rtems/tree/bsps/arm/shared/start/start.S#n485
I think the single core RPIs are ARM1176JZF-S (ARMv6Z).
Oh, yes, this is probably the problem. I wasn't aware that we have a BSP
which uses Armv6. I will try to figure out the right options.
Thanks! As soon as you have something that would work, we can test it.
The CPU architecture is old, but it looks like these models will be in
production until at least 2026.
I didn't find an Armv6 Reference Manual, so I have no idea if this works
for all Armv6 systems (the only one in RTEMS is probably the Raspberry Pi)
diff --git a/bsps/arm/shared/start/start.S b/bsps/arm/shared/start/start.S
index 698495d32e..028bef6d2d 100644
--- a/bsps/arm/shared/start/start.S
+++ b/bsps/arm/shared/start/start.S
@@ -482,7 +482,8 @@ bsp_start_hook_0_done:
.Lvector_table_copy_done:
-#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
+#if __ARM_ARCH == 6 || (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || \
+ __ARM_ARCH >= 8
/*
* This code path is only executed by the primary processor.
Set the
* VBAR to the normal vector table. For secondary processors,
this is
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