Hi, A test fails at the assert(sc==RTEMS_SUCCESSFUL) after a call to rtems_task_set_affinity.
So, following the docs <https://devel.rtems.org/wiki/Debugging/sis>, I figured out where the break point should be set: --------------------------------------------------- $ ~/quick-start/rtems/6/bin/sparc-rtems6-sis -leon3 -m 4 ~/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe SIS - SPARC/RISCV instruction simulator 2.26, copyright Jiri Gaisler 2020 Bug-reports to j...@gaisler.se LEON3 emulation enabled, 4 cpus online, delta 50 clocks Loaded /home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe, entry 0x40000000 cpu0> hi 10 trace history length = 10 cpu0> run Waking CPU 1 Waking CPU 2 Waking CPU 3 assertion "sc == RTEMS_SUCCESSFUL" failed: file "../../../testsuites/smptests/smpschedstrongapa01/init.c", line 264, function: Init cpu 0 in error mode (tt = 0x80) 423950 4000f9e0: 91d02000 ta 0x0 cpu0> hi 423922 40019d40: 90100018 mov %i0, %o0 423923 4000f9e4: 82102001 mov 1, %g1 423924 4000f9e8: 84100008 mov %o0, %g2 423925 4000f9ec: 86100009 mov %o1, %g3 423926 4000f9f0: 91d02000 ta 0x0 423928 40000800: a1480000 mov %psr, %l0 423929 40000804: 2910003e sethi %hi(0x4000f800), %l4 423930 40000808: 81c521e0 jmp %l4 + 0x1e0 423932 4000080c: a6102080 mov 128, %l3 423933 4000f9e0: 91d02000 ta 0x0 cpu0> reg INS LOCALS OUTS GLOBALS 0: 00000007 F3001FC6 00000007 00000000 1: 4002F008 4000F9F0 00000000 00000001 2: 40029CF8 4000F9F4 4002F008 00000007 3: 0000000A 00000080 40020400 4002F008 4: 00000073 4000F800 0000000E 00000000 5: 40029C00 00000000 00000004 00000000 6: 4002EEE0 4002A250 4002EE78 4002CD00 7: 40019D3C 4002CD00 4000EC80 00000000 psr: F3001FC6 wim: 00000008 tbr: 40000800 y: 00000000 pc: 4000F9E0 = 91D02000 ta 0x0 npc: 4000F9E4 = 82102001 mov 1, %g1 IU in error mode cpu0> quit --------------------------------------------------- So the breakpoint has to be set at the second last instruction at address 0x4000080c But when I try to debug this with gdb keeping the sis as remote target, it does not work: ------------------------- $ ~/quick-start/rtems/6/bin/sparc-rtems6-gdb ~/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe GNU gdb (GDB) 10.1.90.20210409-git Copyright (C) 2021 Free Software Foundation, Inc. License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html > This is free software: you are free to change and redistribute it. There is NO WARRANTY, to the extent permitted by law. Type "show copying" and "show warranty" for details. This GDB was configured as "--host=x86_64-linux-gnu --target=sparc-rtems6". Type "show configuration" for configuration details. For bug reporting instructions, please see: <https://www.gnu.org/software/gdb/bugs/>. Find the GDB manual and other documentation resources online at: <http://www.gnu.org/software/gdb/documentation/>. For help, type "help". Type "apropos word" to search for commands related to "word"... Reading symbols from /home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe... (gdb) tar sim -leon3 Undefined target command: "sim -leon3". Try "help target". (gdb) target extended-remote localhost:1234 Remote debugging using localhost:1234 0x00000000 in ?? () (gdb) load Loading section .text, size 0x218f0 lma 0x40000000 Loading section .rtemsroset, size 0x90 lma 0x400218f0 Loading section .data, size 0x530 lma 0x40029980 Start address 0x40000000, load size 138928 Transfer rate: 3083 KB/sec, 271 bytes/write. (gdb) bre 0x4000080c Function "0x4000080c" not defined. Make breakpoint pending on future shared library load? (y or [n]) y Breakpoint 1 (0x4000080c) pending. (gdb) run The program being debugged has been started already. Start it from the beginning? (y or n) y Starting program: /home/richi/sis-quick-start/src/rtems/build/sparc/leon3/testsuites/smptests/smpschedstrongapa01.exe Program received signal SIGTERM, Terminated. syscall () at ../../../cpukit/score/cpu/sparc/syscall.S:44 44 ta 0 ! syscall 1, halt with %g1,%g2,%g3 info (gdb) -------------------- And the output on the other terminal is: ------------------------------------ $ ~/quick-start/rtems/6/bin/sparc-rtems6-sis -leon3 -m 4 -gdb SIS - SPARC/RISCV instruction simulator 2.26, copyright Jiri Gaisler 2020 Bug-reports to j...@gaisler.se LEON3 emulation enabled, 4 cpus online, delta 50 clocks gdb: listening on port 1234 connected X40000000,0:#72 Waking CPU 1 Waking CPU 2 Waking CPU 3 assertion "sc == RTEMS_SUCCESSFUL" failed: file "../../../testsuites/smptests/smpschedstrongapa01/init.c", line 264, function: Init ------------------------------------ So, is there a way I can debug this? Can I use si or ni, cause it is not working here when I tried it after 'load'. Also can I not set breakpoints at functions and then step continue till the function comes? Please advise. Thanks.
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