On Tue, May 18, 2021 at 3:05 PM Gedare Bloom <ged...@rtems.org> wrote: > > On Tue, May 18, 2021 at 2:18 PM Kinsey Moore <kinsey.mo...@oarcorp.com> wrote: > > > > Looks like this fell through the cracks last month and I totally forgot > > about it. > > > > -----Original Message----- > > From: Kinsey Moore <kinsey.mo...@oarcorp.com> > > Sent: Tuesday, April 13, 2021 10:15 > > To: devel@rtems.org > > Cc: Kinsey Moore <kinsey.mo...@oarcorp.com> > > Subject: [PATCH v3] score/aarch64: Align context validation frame > > > > Ensure the stack remains aligned by keeping the context frame at a > > multiple of 16 bytes. This avoids stack alignment exceptions which occur > > when the stack pointer is not 16 byte aligned. > > --- > > .../cpu/aarch64/aarch64-context-validate.S | 29 ++++++++++++------- > > 1 file changed, 18 insertions(+), 11 deletions(-) > > > > diff --git a/cpukit/score/cpu/aarch64/aarch64-context-validate.S > > b/cpukit/score/cpu/aarch64/aarch64-context-validate.S > > index 57f634934b..1e71bc5b3a 100644 > > --- a/cpukit/score/cpu/aarch64/aarch64-context-validate.S > > +++ b/cpukit/score/cpu/aarch64/aarch64-context-validate.S > > @@ -42,7 +42,9 @@ > > > > #include <rtems/asm.h> > > #include <rtems/score/cpu.h> > > +#include <rtems/score/basedefs.h> > > > > +/* These must be 8 byte aligned to avoid misaligned accesses */ > > #define FRAME_OFFSET_X4 0x00 > > #define FRAME_OFFSET_X5 0x08 > > #define FRAME_OFFSET_X6 0x10 > > @@ -54,18 +56,23 @@ > > #define FRAME_OFFSET_LR 0x40 > > > > #ifdef AARCH64_MULTILIB_VFP > > - #define FRAME_OFFSET_V8 0x48 > > - #define FRAME_OFFSET_V9 0x58 > > - #define FRAME_OFFSET_V10 0x68 > > - #define FRAME_OFFSET_V11 0x78 > > - #define FRAME_OFFSET_V12 0x88 > > - #define FRAME_OFFSET_V13 0x98 > > - #define FRAME_OFFSET_V14 0xA8 > > - #define FRAME_OFFSET_V15 0xB8 > > - > > - #define FRAME_SIZE (FRAME_OFFSET_V15 + 0x10) > > + /* These must be 16 byte aligned to avoid misaligned accesses */ > > + #define FRAME_OFFSET_V8 0x50 > > + #define FRAME_OFFSET_V9 0x60 > > + #define FRAME_OFFSET_V10 0x70 > > + #define FRAME_OFFSET_V11 0x80 > > + #define FRAME_OFFSET_V12 0x90 > > + #define FRAME_OFFSET_V13 0xA0 > > + #define FRAME_OFFSET_V14 0xB0 > > + #define FRAME_OFFSET_V15 0xC0 > > + > > These definitions should be consistent with how the Context_Control > structure gets defined (include/rtems/score/cpu.h). I don't think they > are consistent in this port? > nevermind, I think I may be missing something. but I guess the same constraint applies to these registers in the context control, it just happens to work because there are two more variables in the struct (isr_dispatch_disable and thread_id)? this should be documented in cpu.h if it is the case, that these VFP-related registers need to be aligned to 16 bytes.
> > + /* > > + * Force 16 byte alignment of the frame size to avoid stack pointer > > alignment > > + * exceptions. > > + */ > > + #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_V15, 16 ) > > #else > > - #define FRAME_SIZE (FRAME_OFFSET_LR + 0x08) > > + #define FRAME_SIZE RTEMS_ALIGN_UP( FRAME_OFFSET_LR, 16 ) > > #endif > > > > .section .text > > -- > > 2.20.1 > > > > _______________________________________________ > > devel mailing list > > devel@rtems.org > > http://lists.rtems.org/mailman/listinfo/devel _______________________________________________ devel mailing list devel@rtems.org http://lists.rtems.org/mailman/listinfo/devel
